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| Presentation | 2005-05-26 10:30 A Single-Chip Multi-Processor integrating Quadruple Processors on 90nm CMOS Process Ken-ichi Kawasaki, Tetsuyoshi Shiota, Yukihito Kawabe, Wataru Shibamoto, Atsushi Sato, Tetsutaro Hashimoto, Motoaki Matsumura, Hiroshi Okano, Fumihiko Hayakawa, Shinichiro Tago, Yasuki Nakamura (Fujitsu Labs.), Hideo Miyake (FLT), Atsuhiro Suga, Hiromasa Takahashi, Atsuki Inoue (Fujitsu Labs.) Link to ES Tech. Rep. Archives:  ICD2005-21 |
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| Abstract | (in Japanese) | (See Japanese page) |
| (in English) | We have developed a 51.2-GOPS single-chip multi-processor integrating quadruple processors with 1.0-GB/s system-bus direct memory access. Since it is confirmed its power consumption has been 3.0W on actual measurement, we consider it has the highest performance per watt in the micro-processors in the world. In achievement, we have solved the problems of large power supply noise and delay penalty caused by making of large-scale circuit and increasing number of signal I/Os. Therefore, we have operated completely on the system-board at the first-silicon chip. We chiefly reports on our solution for closure of power supply noise problems. |
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| Keyword | (in Japanese) | (See Japanese page) |
| (in English) | Processor / Multi-Core / 90nm / HDTV / Power Supply Noise / Jitter / / | |
| Reference Info. | IEICE Tech. Rep., vol. 105, no. 95, ICD2005-21, pp. 7-12, May 2005. | |
| Paper # | ICD2005-21 | |
| Date of Issue | 2005-05-19 (ICD) | |
| ISSN | Print edition: ISSN 0913-5685 | |
| Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) | |
| Download PDF | Link to ES Tech. Rep. Archives: ICD2005-21 |
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| Conference Information | |
| Committee | ICD |
| Conference Date | 2005-05-26 - 2005-05-27 |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Kobe Univ. |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Paper Information | |
| Registration To | ICD |
| Conference Code | 2005-05-ICD |
| Language | Japanese |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A Single-Chip Multi-Processor integrating Quadruple Processors on 90nm CMOS Process |
| Sub Title (in English) | |
| Keyword(1) | Processor |
| Keyword(2) | Multi-Core |
| Keyword(3) | 90nm |
| Keyword(4) | HDTV |
| Keyword(5) | Power Supply Noise |
| Keyword(6) | Jitter |
| Keyword(7) | |
| Keyword(8) | |
| 1st Author's Name | Ken-ichi Kawasaki |
| 1st Author's Affiliation | Fujitsu Laboratories Ltd. (Fujitsu Labs.) |
| 2nd Author's Name | Tetsuyoshi Shiota |
| 2nd Author's Affiliation | Fujitsu Laboratories Ltd. (Fujitsu Labs.) |
| 3rd Author's Name | Yukihito Kawabe |
| 3rd Author's Affiliation | Fujitsu Laboratories Ltd. (Fujitsu Labs.) |
| 4th Author's Name | Wataru Shibamoto |
| 4th Author's Affiliation | Fujitsu Laboratories Ltd. (Fujitsu Labs.) |
| 5th Author's Name | Atsushi Sato |
| 5th Author's Affiliation | Fujitsu Laboratories Ltd. (Fujitsu Labs.) |
| 6th Author's Name | Tetsutaro Hashimoto |
| 6th Author's Affiliation | Fujitsu Laboratories Ltd. (Fujitsu Labs.) |
| 7th Author's Name | Motoaki Matsumura |
| 7th Author's Affiliation | Fujitsu Laboratories Ltd. (Fujitsu Labs.) |
| 8th Author's Name | Hiroshi Okano |
| 8th Author's Affiliation | Fujitsu Laboratories Ltd. (Fujitsu Labs.) |
| 9th Author's Name | Fumihiko Hayakawa |
| 9th Author's Affiliation | Fujitsu Laboratories Ltd. (Fujitsu Labs.) |
| 10th Author's Name | Shinichiro Tago |
| 10th Author's Affiliation | Fujitsu Laboratories Ltd. (Fujitsu Labs.) |
| 11th Author's Name | Yasuki Nakamura |
| 11th Author's Affiliation | Fujitsu Laboratories Ltd. (Fujitsu Labs.) |
| 12th Author's Name | Hideo Miyake |
| 12th Author's Affiliation | Fujitsu LSI Technology Ltd. (FLT) |
| 13th Author's Name | Atsuhiro Suga |
| 13th Author's Affiliation | Fujitsu Laboratories Ltd. (Fujitsu Labs.) |
| 14th Author's Name | Hiromasa Takahashi |
| 14th Author's Affiliation | Fujitsu Laboratories Ltd. (Fujitsu Labs.) |
| 15th Author's Name | Atsuki Inoue |
| 15th Author's Affiliation | Fujitsu Laboratories Ltd. (Fujitsu Labs.) |
| 16th Author's Name | |
| 16th Author's Affiliation | () |
| 17th Author's Name | |
| 17th Author's Affiliation | () |
| 18th Author's Name | |
| 18th Author's Affiliation | () |
| Speaker | Author-1 |
| Date Time | 2005-05-26 10:30:00 |
| Presentation Time | 30 minutes |
| Registration for | ICD |
| Paper # | ICD2005-21 |
| Volume (vol) | vol.105 |
| Number (no) | no.95 |
| Page | pp.7-12 |
| #Pages | 6 |
| Date of Issue | 2005-05-19 (ICD) |
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