Paper Abstract and Keywords |
Presentation |
2005-09-08 11:20
Diagnostic Test Compaction for Combinational and Sequential Circuits Yoshinobu Higami (Ehime Univ.), Kewal K Saluja (Univ. of Wisconsin), Hiroshi Takahashi, Shin-ya Kobayashi, Yuzo Takamatsu (Ehime Univ.) Link to ES Tech. Rep. Archives: CPM2005-89 ICD2005-99 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
Recently, it is getting important to reduce the cost of test and fault diagnosis.
Since the cost of test and fault diagnosis depends on the number of test vectors, test vectors must be compacted.
This paper presents a method for compacting diagnostic test sets or test sequences for combinational and sequential circuits.
The proposed methods reduce the number of test vectors while maintaining the original diagnostic capability.
In order to compact diagnostic test vectors, we must take care of a large number of fault pairs, which is the square number of faults.
The proposed methods introduce heuristics to reduce the number of fault pairs that are handled at one time.
The effectiveness of the proposed methods are shown by experimental results for ISCAS benchmark circuits. |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
fault diagnosis / test compaction / combinational circuit / sequential circuit / / / / |
Reference Info. |
IEICE Tech. Rep., vol. 105, no. 267, ICD2005-99, pp. 25-30, Sept. 2005. |
Paper # |
ICD2005-99 |
Date of Issue |
2005-09-01 (CPM, ICD) |
ISSN |
Print edition: ISSN 0913-5685 |
Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
Download PDF |
Link to ES Tech. Rep. Archives: CPM2005-89 ICD2005-99 |
Conference Information |
Committee |
ICD CPM |
Conference Date |
2005-09-08 - 2005-09-09 |
Place (in Japanese) |
(See Japanese page) |
Place (in English) |
Kikai-Shinko-Kaikan Bldg. |
Topics (in Japanese) |
(See Japanese page) |
Topics (in English) |
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Paper Information |
Registration To |
ICD |
Conference Code |
2005-09-ICD-CPM |
Language |
Japanese |
Title (in Japanese) |
(See Japanese page) |
Sub Title (in Japanese) |
(See Japanese page) |
Title (in English) |
Diagnostic Test Compaction for Combinational and Sequential Circuits |
Sub Title (in English) |
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Keyword(1) |
fault diagnosis |
Keyword(2) |
test compaction |
Keyword(3) |
combinational circuit |
Keyword(4) |
sequential circuit |
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1st Author's Name |
Yoshinobu Higami |
1st Author's Affiliation |
Ehime University (Ehime Univ.) |
2nd Author's Name |
Kewal K Saluja |
2nd Author's Affiliation |
University of Wisconsin (Univ. of Wisconsin) |
3rd Author's Name |
Hiroshi Takahashi |
3rd Author's Affiliation |
Ehime University (Ehime Univ.) |
4th Author's Name |
Shin-ya Kobayashi |
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Ehime University (Ehime Univ.) |
5th Author's Name |
Yuzo Takamatsu |
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Ehime University (Ehime Univ.) |
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Speaker |
Author-1 |
Date Time |
2005-09-08 11:20:00 |
Presentation Time |
25 minutes |
Registration for |
ICD |
Paper # |
CPM2005-89, ICD2005-99 |
Volume (vol) |
vol.105 |
Number (no) |
no.265(CPM), no.267(ICD) |
Page |
pp.25-30 |
#Pages |
6 |
Date of Issue |
2005-09-01 (CPM, ICD) |
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