Paper Abstract and Keywords |
Presentation |
2006-01-27 14:15
High-Throughput LDPC Decoder Based on Memory-Reduction Method Tatsuyuki Ishikawa, Kazunori Shimizu, Takeshi Ikenaga, Satoshi Goto (Waseda Univ.) Link to ES Tech. Rep. Archives: ICD2005-220 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
In this paper, we propose a high-throughput partially-parallel LDPC decoder for long code-length.
The decoder achieves high-throughput by operating row-operations and column-operations concurrently.
Furthermore, we propose a memory-reduction method by using characteristic of row-operation data on Min-Sum algorithm and correlation of row-operation data and column-operation data.
We have designed partially-parallel decoder by using these method.
The decoder decodes (3,6)-11520 bit LDPC codes and achieves throughput of 598 Mb/s. |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
low-density parity check(LDPC) codes / min-sum algorithm / partially-parallel LDPC decoder / memory-reduction / / / / |
Reference Info. |
IEICE Tech. Rep., vol. 105, no. 570, ICD2005-220, pp. 29-34, Jan. 2006. |
Paper # |
ICD2005-220 |
Date of Issue |
2006-01-20 (ICD) |
ISSN |
Print edition: ISSN 0913-5685 |
Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
Download PDF |
Link to ES Tech. Rep. Archives: ICD2005-220 |
Conference Information |
Committee |
ICD ITE-CE |
Conference Date |
2006-01-26 - 2006-01-27 |
Place (in Japanese) |
(See Japanese page) |
Place (in English) |
Kikai-Shinko-Kaikan Bldg. |
Topics (in Japanese) |
(See Japanese page) |
Topics (in English) |
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Paper Information |
Registration To |
ICD |
Conference Code |
2006-01-ICD-ITE-CE |
Language |
Japanese |
Title (in Japanese) |
(See Japanese page) |
Sub Title (in Japanese) |
(See Japanese page) |
Title (in English) |
High-Throughput LDPC Decoder Based on Memory-Reduction Method |
Sub Title (in English) |
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Keyword(1) |
low-density parity check(LDPC) codes |
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min-sum algorithm |
Keyword(3) |
partially-parallel LDPC decoder |
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memory-reduction |
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1st Author's Name |
Tatsuyuki Ishikawa |
1st Author's Affiliation |
Waseda University (Waseda Univ.) |
2nd Author's Name |
Kazunori Shimizu |
2nd Author's Affiliation |
Waseda University (Waseda Univ.) |
3rd Author's Name |
Takeshi Ikenaga |
3rd Author's Affiliation |
Waseda University (Waseda Univ.) |
4th Author's Name |
Satoshi Goto |
4th Author's Affiliation |
Waseda University (Waseda Univ.) |
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Speaker |
Author-1 |
Date Time |
2006-01-27 14:15:00 |
Presentation Time |
30 minutes |
Registration for |
ICD |
Paper # |
ICD2005-220 |
Volume (vol) |
vol.105 |
Number (no) |
no.570 |
Page |
pp.29-34 |
#Pages |
6 |
Date of Issue |
2006-01-20 (ICD) |