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Paper Abstract and Keywords
Presentation 2006-03-09 10:05
An accurate static power analysis method which considers local switching activities
Tatsuya Yamamoto, Yuu Yamashita, Katsuhiro Oshikawa, Masahiro Fukui (Rits) Link to ES Tech. Rep. Archives: ICD2005-227
Abstract (in Japanese) (See Japanese page) 
(in English) For the logic level power estimation, there are two types of algorithms, i.e. dynamic and static ones, conventionally. The static power estimation is based on an average switching activity of each logic gate using an average transition density of input vector stream. Dynamic algorithm depends on input vector sequence but static one depends only on the average of input vector. Using the average input vector brings lack of information that characterizes each input vector sequence, which causes inaccuracy but less computation time. This paper proposes a new algorithm that calculates local transition density in time domain by dividing input vector. That achieves more accuracy and less computation time.
Keyword (in Japanese) (See Japanese page) 
(in English) static power estimation / gate level / switching activity / / / / /  
Reference Info. IEICE Tech. Rep., vol. 105, no. 644, VLD2005-110, pp. 13-18, March 2006.
Paper # VLD2005-110 
Date of Issue 2006-03-02 (VLD, ICD) 
ISSN Print edition: ISSN 0913-5685
Copyright
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reproduction
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF Link to ES Tech. Rep. Archives: ICD2005-227

Conference Information
Committee ICD VLD  
Conference Date 2006-03-09 - 2006-03-10 
Place (in Japanese) (See Japanese page) 
Place (in English)  
Topics (in Japanese) (See Japanese page) 
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Paper Information
Registration To VLD 
Conference Code 2006-03-ICD-VLD 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) An accurate static power analysis method which considers local switching activities 
Sub Title (in English)  
Keyword(1) static power estimation  
Keyword(2) gate level  
Keyword(3) switching activity  
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1st Author's Name Tatsuya Yamamoto  
1st Author's Affiliation Ritsumeikan University (Rits)
2nd Author's Name Yuu Yamashita  
2nd Author's Affiliation Ritsumeikan University (Rits)
3rd Author's Name Katsuhiro Oshikawa  
3rd Author's Affiliation Ritsumeikan University (Rits)
4th Author's Name Masahiro Fukui  
4th Author's Affiliation Ritsumeikan University (Rits)
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Speaker Author-1 
Date Time 2006-03-09 10:05:00 
Presentation Time 25 minutes 
Registration for VLD 
Paper # VLD2005-110, ICD2005-227 
Volume (vol) vol.105 
Number (no) no.644(VLD), no.646(ICD) 
Page pp.13-18 
#Pages
Date of Issue 2006-03-02 (VLD, ICD) 


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