Paper Abstract and Keywords |
Presentation |
2007-06-09 13:10
Fast Signal Generations of Logistic Map employing 128 bit Fixed Point Calculation(FPGA) (II)
-- Its Application to 16 Cities TSP using Permutation Accelerator -- Atsushi Hama, Katsufusa Shono (Nagano Prefecture General Industrial Technology Center) NLP2007-30 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
One chaos stream starting at an initial value gives us the shortest distance root of 16 cities TSP (traveling salesman problem). Fixed point calculation (precision is 128 bits, output is 256 bits) of the logistic map was employed for providing quasi random numbers, whose length is very close to but less than 2^64 (mapping period). 0~15 permutations are taken out from quasi random number 256 bits effectively, and permutation accelerators were employed to generate additional 0~15 permutations. By the five parallel operations of the simulation system the shortest distance root was found at around 10^10 trials within the maximum numbers of 16!~2.09×10^13 ones. |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
Fixed Point Calculation / FPGA / Logistic Map / Chaotic States / TSP / Permutation Accelerator / / |
Reference Info. |
IEICE Tech. Rep., vol. 107, no. 87, NLP2007-30, pp. 43-46, June 2007. |
Paper # |
NLP2007-30 |
Date of Issue |
2007-06-02 (NLP) |
ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
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NLP2007-30 |
Conference Information |
Committee |
NLP |
Conference Date |
2007-06-08 - 2007-06-09 |
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(See Japanese page) |
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Paper Information |
Registration To |
NLP |
Conference Code |
2007-06-NLP |
Language |
Japanese |
Title (in Japanese) |
(See Japanese page) |
Sub Title (in Japanese) |
(See Japanese page) |
Title (in English) |
Fast Signal Generations of Logistic Map employing 128 bit Fixed Point Calculation(FPGA) (II) |
Sub Title (in English) |
Its Application to 16 Cities TSP using Permutation Accelerator |
Keyword(1) |
Fixed Point Calculation |
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FPGA |
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Logistic Map |
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Chaotic States |
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TSP |
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Permutation Accelerator |
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1st Author's Name |
Atsushi Hama |
1st Author's Affiliation |
Nagano Prefecture General Industrial Technology Center (Nagano Prefecture General Industrial Technology Center) |
2nd Author's Name |
Katsufusa Shono |
2nd Author's Affiliation |
Nagano Prefecture General Industrial Technology Center (Nagano Prefecture General Industrial Technology Center) |
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Speaker |
Author-1 |
Date Time |
2007-06-09 13:10:00 |
Presentation Time |
25 minutes |
Registration for |
NLP |
Paper # |
NLP2007-30 |
Volume (vol) |
vol.107 |
Number (no) |
no.87 |
Page |
pp.43-46 |
#Pages |
4 |
Date of Issue |
2007-06-02 (NLP) |