Paper Abstract and Keywords |
Presentation |
2007-10-18 14:50
Derivation of Circuit Level Specifications of ΔΣ Modulator Based on Behavioral Modeling and Simulation Yasuji Ikeda, Hideki Asai (Shizuoka Univ.) CAS2007-47 NLP2007-75 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
A technique is presented for high-level synthesis using behavioral modeling of delta-sigma modulator. Verilog-A is used as the analog HDL (hardware description language) for behavioral modeling which enables to consider a variety of nonidealities. The block specification parameters which cause nonideal influence are expressed as the function of capacitor size and bias current. The method of optimizing those parameters and estimating current consumption by behavioral model simulation is described. By this method, SNR and current consumption for several topologies are estimated and the optimal parameters and the topology to target SNR are derived as a transistor level design specification. |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
Delta-sigma Modulator / Analog HDL / Behavioral modeling and simulation / Optimization / / / / |
Reference Info. |
IEICE Tech. Rep., vol. 107, no. 264, CAS2007-47, pp. 73-77, Oct. 2007. |
Paper # |
CAS2007-47 |
Date of Issue |
2007-10-11 (CAS, NLP) |
ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
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CAS2007-47 NLP2007-75 |
Conference Information |
Committee |
CAS NLP |
Conference Date |
2007-10-18 - 2007-10-19 |
Place (in Japanese) |
(See Japanese page) |
Place (in English) |
Musashi Institute of Technology |
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(See Japanese page) |
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Paper Information |
Registration To |
CAS |
Conference Code |
2007-10-CAS-NLP |
Language |
Japanese |
Title (in Japanese) |
(See Japanese page) |
Sub Title (in Japanese) |
(See Japanese page) |
Title (in English) |
Derivation of Circuit Level Specifications of ΔΣ Modulator Based on Behavioral Modeling and Simulation |
Sub Title (in English) |
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Delta-sigma Modulator |
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Analog HDL |
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Behavioral modeling and simulation |
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Optimization |
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1st Author's Name |
Yasuji Ikeda |
1st Author's Affiliation |
Shizuoka University (Shizuoka Univ.) |
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Hideki Asai |
2nd Author's Affiliation |
Shizuoka University (Shizuoka Univ.) |
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Speaker |
Author-1 |
Date Time |
2007-10-18 14:50:00 |
Presentation Time |
20 minutes |
Registration for |
CAS |
Paper # |
CAS2007-47, NLP2007-75 |
Volume (vol) |
vol.107 |
Number (no) |
no.264(CAS), no.266(NLP) |
Page |
pp.73-77 |
#Pages |
5 |
Date of Issue |
2007-10-11 (CAS, NLP) |
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