IEICE Technical Committee Submission System
Conference Paper's Information
Online Proceedings
[Sign in]
Tech. Rep. Archives
 Go Top Page Go Previous   [Japanese] / [English] 

Paper Abstract and Keywords
Presentation 2008-05-14 16:00
Considering Performance and Area Overhead in DVS System Utilizing Input Variations
Yuji Kunitake (Kyushu U.), Toshinori Sato (Fukuoka U.), Hiroto Yasuura (Kyushu U.) Link to ES Tech. Rep. Archives: ICD2008-34
Abstract (in Japanese) (See Japanese page) 
(in English) The deep submicron semiconductor technologies increase parameter variations and thus the processor design becomes more difficult. The increase in parameter variations requirs excessive design margin that has serious impact on performance and power consumption. In order to eliminate the excessive design margin, we are investigating canary logic. Current canary logic causes severe performance loss and area overhead. In this paper, we show solutions for these problems.
Keyword (in Japanese) (See Japanese page) 
(in English) variation / Dynamic Voltage Scaling / reliability / / / / /  
Reference Info. IEICE Tech. Rep., vol. 108, pp. 93-98, May 2008.
Paper #  
Date of Issue 2008-05-06 (ICD) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF Link to ES Tech. Rep. Archives: ICD2008-34

Conference Information
Committee ICD IPSJ-ARC  
Conference Date 2008-05-13 - 2008-05-14 
Place (in Japanese) (See Japanese page) 
Place (in English)  
Topics (in Japanese) (See Japanese page) 
Topics (in English)  
Paper Information
Registration To IPSJ-ARC 
Conference Code 2008-05-ICD-ARC 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Considering Performance and Area Overhead in DVS System Utilizing Input Variations 
Sub Title (in English)  
Keyword(1) variation  
Keyword(2) Dynamic Voltage Scaling  
Keyword(3) reliability  
Keyword(4)  
Keyword(5)  
Keyword(6)  
Keyword(7)  
Keyword(8)  
1st Author's Name Yuji Kunitake  
1st Author's Affiliation Kyushu University (Kyushu U.)
2nd Author's Name Toshinori Sato  
2nd Author's Affiliation Fukuoka University (Fukuoka U.)
3rd Author's Name Hiroto Yasuura  
3rd Author's Affiliation Kyushu University (Kyushu U.)
4th Author's Name  
4th Author's Affiliation ()
5th Author's Name  
5th Author's Affiliation ()
6th Author's Name  
6th Author's Affiliation ()
7th Author's Name  
7th Author's Affiliation ()
8th Author's Name  
8th Author's Affiliation ()
9th Author's Name  
9th Author's Affiliation ()
10th Author's Name  
10th Author's Affiliation ()
11th Author's Name  
11th Author's Affiliation ()
12th Author's Name  
12th Author's Affiliation ()
13th Author's Name  
13th Author's Affiliation ()
14th Author's Name  
14th Author's Affiliation ()
15th Author's Name  
15th Author's Affiliation ()
16th Author's Name  
16th Author's Affiliation ()
17th Author's Name  
17th Author's Affiliation ()
18th Author's Name  
18th Author's Affiliation ()
19th Author's Name  
19th Author's Affiliation ()
20th Author's Name  
20th Author's Affiliation ()
Speaker Author-1 
Date Time 2008-05-14 16:00:00 
Presentation Time 30 minutes 
Registration for IPSJ-ARC 
Paper # ICD2008-34 
Volume (vol) vol.108 
Number (no) no.28 
Page pp.93-98 
#Pages
Date of Issue 2008-05-06 (ICD) 


[Return to Top Page]

[Return to IEICE Web Page]


The Institute of Electronics, Information and Communication Engineers (IEICE), Japan