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| Presentation | 2008-06-27 09:00 Customizable Hardware/Software Evaluation Method Using Simple High-level Synthesis Chongyang Zhang (Waseda Univ.), Toshiro Isomura, Yu Suzuki (Toyota Motor Corp.), Shinji Kimura (Waseda Univ.)  CAS2008-19 VLD2008-32 SIP2008-53 |
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| Abstract | (in Japanese) | (See Japanese page) |
| (in English) | In hardware/software codesign, the functional description of an information system is optimized as a mixture of software modules and hardware modules. The partitioning of hardware/software modules is the crucial step of the optimization. To evaluate the precise execution time and the precise amount of resources, we need to decide the processor and compile the software modules for the processor and we also need to do the high-level synthesis, logic synthesis and layout for hardware modules. After these steps we can do the co-simulation of the system using the practical data. The compilation/synthesis steps and the co-simulation steps are time-consuming and so we would like to estimate the partitioning more easily at the initial phase of the co-design. In this report, we show a customizable hardware/software partitioning evaluation method using a simple high-level synthesis system. After generating the sequence of operations using the high-level synthesis system, we count the number of clocks and the amount of resources. The number of clocks and the amount of resources for each operation is specified by a customizable table and we can measure the total clocks and resources using the evaluation method. By adjusting the values of the parameters, this method can evaluate the system performance precisely with small amount of time. | |
| Keyword | (in Japanese) | (See Japanese page) |
| (in English) | Hardware/Software Co-design / Simplified High-level Synthesis Environment / Parameterized evaluation of clocks and resources / / / / / | |
| Reference Info. | IEICE Tech. Rep., vol. 108, no. 107, VLD2008-32, pp. 1-6, June 2008. | |
| Paper # | VLD2008-32 | |
| Date of Issue | 2008-06-20 (CAS, VLD, SIP) | |
| ISSN | Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 | |
| Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) | |
| Download PDF | CAS2008-19 VLD2008-32 SIP2008-53 |
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| Conference Information | |
| Committee | VLD CAS SIP |
| Conference Date | 2008-06-26 - 2008-06-27 |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Hokkaido Univ. |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Paper Information | |
| Registration To | VLD |
| Conference Code | 2008-06-VLD-CAS-SIP |
| Language | Japanese |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Customizable Hardware/Software Evaluation Method Using Simple High-level Synthesis |
| Sub Title (in English) | |
| Keyword(1) | Hardware/Software Co-design |
| Keyword(2) | Simplified High-level Synthesis Environment |
| Keyword(3) | Parameterized evaluation of clocks and resources |
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| 1st Author's Name | Chongyang Zhang |
| 1st Author's Affiliation | Waseda University (Waseda Univ.) |
| 2nd Author's Name | Toshiro Isomura |
| 2nd Author's Affiliation | Toyota Motor Corporation (Toyota Motor Corp.) |
| 3rd Author's Name | Yu Suzuki |
| 3rd Author's Affiliation | Toyota Motor Corporation (Toyota Motor Corp.) |
| 4th Author's Name | Shinji Kimura |
| 4th Author's Affiliation | Waseda University (Waseda Univ.) |
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| Speaker | Author-1 |
| Date Time | 2008-06-27 09:00:00 |
| Presentation Time | 20 minutes |
| Registration for | VLD |
| Paper # | CAS2008-19, VLD2008-32, SIP2008-53 |
| Volume (vol) | vol.108 |
| Number (no) | no.105(CAS), no.107(VLD), no.109(SIP) |
| Page | pp.1-6 |
| #Pages | 6 |
| Date of Issue | 2008-06-20 (CAS, VLD, SIP) |
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