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Paper Abstract and Keywords
Presentation 2008-11-17 13:25
Dynamically Variable Secure Scan Architecture against Scan-based Side Channel Attack on Cryptography LSIs
Hiroshi Atobe, Ryuta Nara, Youhua Shi, Nozomu Togawa, Masao Yanagisawa, Tatsuo Ohtsuki (Waseda Univ.) VLD2008-69 DC2008-37
Abstract (in Japanese) (See Japanese page) 
(in English) Scan test is a powerful and popular test technique because it can control and observe the internal states of the circuit under test. However, scan chains would be used to discover the internals of crypto hardware, which presents a significant security risk of information leakage. An interesting design-for-test technique by inserting inverters into the internal scan chains to complicate the scan structure has been recently presented. Unfortunately, it still carries the potential of being attacked through statistical analysis of the information scanned out from chips. Therefore, in this paper we propose secure scan architecture, called dynamic variable secure scan, against scan-based side channel attack. The modified scan flip-flops are state-dependent, which could cause the output of each SDSFF to be inverted or not so as to make it more difficult to discover the internal scan architecture. We made an analysis on an AES implementation to show the effectiveness of the proposed method and discussed how our approach is resistant to scan-based side channel attack.
Keyword (in Japanese) (See Japanese page) 
(in English) Scan-based attack / Secure scan architecture / Scan chain / AES / / / /  
Reference Info. IEICE Tech. Rep., vol. 108, no. 298, VLD2008-69, pp. 55-59, Nov. 2008.
Paper # VLD2008-69 
Date of Issue 2008-11-10 (VLD, DC) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
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reproduction
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
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Conference Information
Committee VLD DC IPSJ-SLDM CPSY RECONF ICD CPM  
Conference Date 2008-11-17 - 2008-11-19 
Place (in Japanese) (See Japanese page) 
Place (in English) Kitakyushu Science and Research Park 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Design Gaia 2008 ―New field of VLSI design― 
Paper Information
Registration To VLD 
Conference Code 2008-11-VLD-DC-SLDM-CPSY-RECONF-ICD-CPM 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Dynamically Variable Secure Scan Architecture against Scan-based Side Channel Attack on Cryptography LSIs 
Sub Title (in English)  
Keyword(1) Scan-based attack  
Keyword(2) Secure scan architecture  
Keyword(3) Scan chain  
Keyword(4) AES  
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1st Author's Name Hiroshi Atobe  
1st Author's Affiliation Waseda University (Waseda Univ.)
2nd Author's Name Ryuta Nara  
2nd Author's Affiliation Waseda University (Waseda Univ.)
3rd Author's Name Youhua Shi  
3rd Author's Affiliation Waseda University (Waseda Univ.)
4th Author's Name Nozomu Togawa  
4th Author's Affiliation Waseda University (Waseda Univ.)
5th Author's Name Masao Yanagisawa  
5th Author's Affiliation Waseda University (Waseda Univ.)
6th Author's Name Tatsuo Ohtsuki  
6th Author's Affiliation Waseda University (Waseda Univ.)
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Speaker Author-1 
Date Time 2008-11-17 13:25:00 
Presentation Time 25 minutes 
Registration for VLD 
Paper # VLD2008-69, DC2008-37 
Volume (vol) vol.108 
Number (no) no.298(VLD), no.299(DC) 
Page pp.55-59 
#Pages
Date of Issue 2008-11-10 (VLD, DC) 


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