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Paper Abstract and Keywords
Presentation 2008-11-18 10:00
A Path-Based Thread Partitioning Technique Considering Loop Structures
Hirohito Ogawa, Kanemitsu Ootsu, Takashi Yokota, Takanobu Baba (Utsunomiya Univ.) CPSY2008-37
Abstract (in Japanese) (See Japanese page) 
(in English) Speed-up by the multithreaded execution is important to make use of the
performance of the multi-core processor effectively.
We developed a path-based thread partitioning technique that pays attention to a path of the highest execution frequency.However, it tends to less parallelism when a target program has loop structures.
In this paper, we improve our path-based thread partitioning technique by introducing a strip mining.
We apply the improved technique to practical application programs and evaluate the performance by simulation.
Keyword (in Japanese) (See Japanese page) 
(in English) speculative multithreading / thread partitioning / program path / / / / /  
Reference Info. IEICE Tech. Rep., vol. 108, no. 303, CPSY2008-37, pp. 1-6, Nov. 2008.
Paper # CPSY2008-37 
Date of Issue 2008-11-11 (CPSY) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
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reproduction
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
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Conference Information
Committee VLD DC IPSJ-SLDM CPSY RECONF ICD CPM  
Conference Date 2008-11-17 - 2008-11-19 
Place (in Japanese) (See Japanese page) 
Place (in English) Kitakyushu Science and Research Park 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Design Gaia 2008 ―New field of VLSI design― 
Paper Information
Registration To CPSY 
Conference Code 2008-11-VLD-DC-SLDM-CPSY-RECONF-ICD-CPM 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) A Path-Based Thread Partitioning Technique Considering Loop Structures 
Sub Title (in English)  
Keyword(1) speculative multithreading  
Keyword(2) thread partitioning  
Keyword(3) program path  
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1st Author's Name Hirohito Ogawa  
1st Author's Affiliation Utsunomiya University (Utsunomiya Univ.)
2nd Author's Name Kanemitsu Ootsu  
2nd Author's Affiliation Utsunomiya University (Utsunomiya Univ.)
3rd Author's Name Takashi Yokota  
3rd Author's Affiliation Utsunomiya University (Utsunomiya Univ.)
4th Author's Name Takanobu Baba  
4th Author's Affiliation Utsunomiya University (Utsunomiya Univ.)
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Speaker Author-1 
Date Time 2008-11-18 10:00:00 
Presentation Time 25 minutes 
Registration for CPSY 
Paper # CPSY2008-37 
Volume (vol) vol.108 
Number (no) no.303 
Page pp.1-6 
#Pages
Date of Issue 2008-11-11 (CPSY) 


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