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Paper Abstract and Keywords
Presentation 2008-12-12 14:10
The Development of CAD Design Tools for Via Programmable Logic Device VPEX
Yuuichi Kokushou, Masahide Kawarasaki, Kouta Ishibashi, Tomohiro Nishimoto, Kazuma Kitamura (Ritsumeikan Univ), Masaya Yoshikawa (Meijyou Univ), Takeshi Fujino (Ritsumeikan Univ) ICD2008-123 Link to ES Tech. Rep. Archives: ICD2008-123
Abstract (in Japanese) (See Japanese page) 
(in English) We have been studied the user-programmable device called VPEX(Via Programmable logic using Exclusive or array) which can customize the digital logic circuit by programming two via-layers. We can eliminate mask cost by applying Electron Beam(EB) direct writing in the patterning of via-layers. The logic element (LE) of VPEX is composed of complex-gate type EXclusive-OR(EXOR) and Inverter(INV). The single LE can output 12 logic functions which include all 2-input logic functions by changing via-1 layer. Moreover, D-FlipFlops(DFFs) can be composed of 5LEs, so there is no need to prepare pre-fabricated DFFs, as shown in FPGA-like LEs. The wiring resources between LEs are fixed structured metal-3, metal-4, and programmable via-3 layer. The dedicated CAD tools for VPEX have to be developed in order to program VPEX device. In the paper, we introduce the CAD system for VPEX, especially the detail of placement program.
Keyword (in Japanese) (See Japanese page) 
(in English) Via-programmable logic / EB direct writing / Exclusive-OR / structured ASIC / MinCut / Steiner / /  
Reference Info. IEICE Tech. Rep., vol. 108, no. 347, ICD2008-123, pp. 107-112, Dec. 2008.
Paper # ICD2008-123 
Date of Issue 2008-12-04 (ICD) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
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All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF ICD2008-123 Link to ES Tech. Rep. Archives: ICD2008-123

Conference Information
Committee ICD  
Conference Date 2008-12-11 - 2008-12-12 
Place (in Japanese) (See Japanese page) 
Place (in English) Tokyo Inst. Tech., Ohokayama Campus, Kokusa-Kouryu-Kaikan 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Workshop for Graduate Student and Young Researchers 
Paper Information
Registration To ICD 
Conference Code 2008-12-ICD 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) The Development of CAD Design Tools for Via Programmable Logic Device VPEX 
Sub Title (in English)  
Keyword(1) Via-programmable logic  
Keyword(2) EB direct writing  
Keyword(3) Exclusive-OR  
Keyword(4) structured ASIC  
Keyword(5) MinCut  
Keyword(6) Steiner  
Keyword(7)  
Keyword(8)  
1st Author's Name Yuuichi Kokushou  
1st Author's Affiliation Ritsumeikan University (Ritsumeikan Univ)
2nd Author's Name Masahide Kawarasaki  
2nd Author's Affiliation Ritsumeikan University (Ritsumeikan Univ)
3rd Author's Name Kouta Ishibashi  
3rd Author's Affiliation Ritsumeikan University (Ritsumeikan Univ)
4th Author's Name Tomohiro Nishimoto  
4th Author's Affiliation Ritsumeikan University (Ritsumeikan Univ)
5th Author's Name Kazuma Kitamura  
5th Author's Affiliation Ritsumeikan University (Ritsumeikan Univ)
6th Author's Name Masaya Yoshikawa  
6th Author's Affiliation Meijyou University (Meijyou Univ)
7th Author's Name Takeshi Fujino  
7th Author's Affiliation Ritsumeikan University (Ritsumeikan Univ)
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Speaker Author-1 
Date Time 2008-12-12 14:10:00 
Presentation Time 25 minutes 
Registration for ICD 
Paper # ICD2008-123 
Volume (vol) vol.108 
Number (no) no.347 
Page pp.107-112 
#Pages
Date of Issue 2008-12-04 (ICD) 


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