Paper Abstract and Keywords |
Presentation |
2008-12-12 14:10
The Development of CAD Design Tools for Via Programmable Logic Device VPEX Yuuichi Kokushou, Masahide Kawarasaki, Kouta Ishibashi, Tomohiro Nishimoto, Kazuma Kitamura (Ritsumeikan Univ), Masaya Yoshikawa (Meijyou Univ), Takeshi Fujino (Ritsumeikan Univ) ICD2008-123 Link to ES Tech. Rep. Archives: ICD2008-123 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
We have been studied the user-programmable device called VPEX(Via Programmable logic using Exclusive or array) which can customize the digital logic circuit by programming two via-layers. We can eliminate mask cost by applying Electron Beam(EB) direct writing in the patterning of via-layers. The logic element (LE) of VPEX is composed of complex-gate type EXclusive-OR(EXOR) and Inverter(INV). The single LE can output 12 logic functions which include all 2-input logic functions by changing via-1 layer. Moreover, D-FlipFlops(DFFs) can be composed of 5LEs, so there is no need to prepare pre-fabricated DFFs, as shown in FPGA-like LEs. The wiring resources between LEs are fixed structured metal-3, metal-4, and programmable via-3 layer. The dedicated CAD tools for VPEX have to be developed in order to program VPEX device. In the paper, we introduce the CAD system for VPEX, especially the detail of placement program. |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
Via-programmable logic / EB direct writing / Exclusive-OR / structured ASIC / MinCut / Steiner / / |
Reference Info. |
IEICE Tech. Rep., vol. 108, no. 347, ICD2008-123, pp. 107-112, Dec. 2008. |
Paper # |
ICD2008-123 |
Date of Issue |
2008-12-04 (ICD) |
ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
Copyright and reproduction |
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ICD2008-123 Link to ES Tech. Rep. Archives: ICD2008-123 |
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