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| Presentation | 2009-04-21 13:50 Fast Soft Error Rate Estimation for Circuits Containing Arithmetic Units Motoharu Hirata, Masayoshi Yoshimura, Yusuke Matsunaga, Hiroto Yasuura (Kyushu Univ.)  CPSY2009-5 DC2009-5 |
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| Abstract | (in Japanese) | (See Japanese page) |
| (in English) | This paper describes soft errors which are errors in LSI that are due to external radiation.The soft error rate (SER) which means probability of invalid outputs per unit time is one of the estimetion measures for soft error tolerance of LSI. Logic level estimation method by the fault simulation can strict SER estimation technique.But If worst comes to worst, it costs time that is proportional to the square of scale of the circuit. The proposed technique can fast SER estimation by omission of logic level simulation in arithmetic units.If we know the input values of arithmetic units, we can calculate the output values of them at high speed by arithmetic operation.When error occured in arithmetic units, the proposed technique uses probabilistic medel about the error propagation to the output of them.The model generates output values of them artifically.The proposed technique aims at the speed-up of the SER estimation by using the model. Experimental result shows that the proposed technique can estimate about four times as fast as existing technique although the accuracy hardly falls. |
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| Keyword | (in Japanese) | (See Japanese page) |
| (in English) | soft error / soft error rate(SER) / fault simulation / arithmetic unit / / / / | |
| Reference Info. | IEICE Tech. Rep., vol. 109, no. 12, DC2009-5, pp. 25-30, April 2009. | |
| Paper # | DC2009-5 | |
| Date of Issue | 2009-04-14 (CPSY, DC) | |
| ISSN | Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 | |
| Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) | |
| Download PDF | CPSY2009-5 DC2009-5 |
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| Conference Information | |
| Committee | DC CPSY |
| Conference Date | 2009-04-21 - 2009-04-21 |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Akihabara Satellite Campus, Tokyo Metropolitan Univ. |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | Dependable Computer Systems, Security Technology, etc. |
| Paper Information | |
| Registration To | DC |
| Conference Code | 2009-04-DC-CPSY |
| Language | Japanese |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Fast Soft Error Rate Estimation for Circuits Containing Arithmetic Units |
| Sub Title (in English) | |
| Keyword(1) | soft error |
| Keyword(2) | soft error rate(SER) |
| Keyword(3) | fault simulation |
| Keyword(4) | arithmetic unit |
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| 1st Author's Name | Motoharu Hirata |
| 1st Author's Affiliation | Kyushu University (Kyushu Univ.) |
| 2nd Author's Name | Masayoshi Yoshimura |
| 2nd Author's Affiliation | Kyushu University (Kyushu Univ.) |
| 3rd Author's Name | Yusuke Matsunaga |
| 3rd Author's Affiliation | Kyushu University (Kyushu Univ.) |
| 4th Author's Name | Hiroto Yasuura |
| 4th Author's Affiliation | Kyushu University (Kyushu Univ.) |
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| Speaker | Author-1 |
| Date Time | 2009-04-21 13:50:00 |
| Presentation Time | 25 minutes |
| Registration for | DC |
| Paper # | CPSY2009-5, DC2009-5 |
| Volume (vol) | vol.109 |
| Number (no) | no.11(CPSY), no.12(DC) |
| Page | pp.25-30 |
| #Pages | 6 |
| Date of Issue | 2009-04-14 (CPSY, DC) |
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