Paper Abstract and Keywords |
Presentation |
2009-07-01 14:30
A Bound of Errors of a Solution for a kind of Resistive Circuits Including Active Elements Tetsuo Nishi, Shin'ichi Oishi, Yusuke Nakaya (Waseda Univ.) CAS2009-4 VLD2009-9 SIP2009-21 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
We show that the validated analysis for some kinds of networks composed of linear passive resistors and some kinds of active elements such as VCVS, CCCS and transistors are possible without any knowledge on the method of constructing a circuit equation, results of LU decomposition, etc. The evaluation of the bound of errors are given in terms of circuit elements and residual currents at each node. The hyperdominancy of the part of linear passive resistor circuit is utilized for the analysis. |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
accuracy-guaranteed algorithm / linear passive resistor network / VCVS / CCCS / transistor / hyperdominant matrix / / |
Reference Info. |
IEICE Tech. Rep., vol. 109, no. 110, CAS2009-4, pp. 19-24, July 2009. |
Paper # |
CAS2009-4 |
Date of Issue |
2009-06-24 (CAS, VLD, SIP) |
ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
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CAS2009-4 VLD2009-9 SIP2009-21 |
Conference Information |
Committee |
SIP CAS VLD |
Conference Date |
2009-07-01 - 2009-07-02 |
Place (in Japanese) |
(See Japanese page) |
Place (in English) |
Kushiko-shi Shogai Gakushu Center |
Topics (in Japanese) |
(See Japanese page) |
Topics (in English) |
Signal processing, LSI, etc. |
Paper Information |
Registration To |
CAS |
Conference Code |
2009-07-SIP-CAS-VLD |
Language |
Japanese |
Title (in Japanese) |
(See Japanese page) |
Sub Title (in Japanese) |
(See Japanese page) |
Title (in English) |
A Bound of Errors of a Solution for a kind of Resistive Circuits Including Active Elements |
Sub Title (in English) |
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Keyword(1) |
accuracy-guaranteed algorithm |
Keyword(2) |
linear passive resistor network |
Keyword(3) |
VCVS |
Keyword(4) |
CCCS |
Keyword(5) |
transistor |
Keyword(6) |
hyperdominant matrix |
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1st Author's Name |
Tetsuo Nishi |
1st Author's Affiliation |
Waseda University (Waseda Univ.) |
2nd Author's Name |
Shin'ichi Oishi |
2nd Author's Affiliation |
Waseda University (Waseda Univ.) |
3rd Author's Name |
Yusuke Nakaya |
3rd Author's Affiliation |
Waseda University (Waseda Univ.) |
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Speaker |
Author-1 |
Date Time |
2009-07-01 14:30:00 |
Presentation Time |
20 minutes |
Registration for |
CAS |
Paper # |
CAS2009-4, VLD2009-9, SIP2009-21 |
Volume (vol) |
vol.109 |
Number (no) |
no.110(CAS), no.111(VLD), no.112(SIP) |
Page |
pp.19-24 |
#Pages |
6 |
Date of Issue |
2009-06-24 (CAS, VLD, SIP) |
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