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| Presentation | 2009-09-24 16:00 [Invited Talk] Massive-Parallel Memory-Embedded SIMD Processor Architecture Tetsushi Koide, Takeshi Kumaki, Hans Juergen Mattausch (Hiroshima Univ.)  CAS2009-34 NLP2009-70 |
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| Abstract | (in Japanese) | (See Japanese page) |
| (in English) | A multimedia processor requires the four capabilities offast processing, small area size, low power consumption and programmability to be useful for developing the societies multimedia environment. Generally, multimedia applications consist of repeated numerical calculations and table-lookup-coding. A conventional DSP has difficulties to process both of these two operations efficiently on a common hardware. In this paper, for further improving the processing efficiency of multimedia application, a CAM (Content Addressable Memory) is embedded in a super parallel SIMD processor and exploited to process repeated numerical calculations and table-lookup-coding. We verify the effectiveness of the proposed architecture for a applications like the JPEG compression standard and face detection algotithms. |
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| Keyword | (in Japanese) | (See Japanese page) |
| (in English) | Parallel processing / SIMD processor / Low power consumption / CAM / / JPEG compression / Face detection / | |
| Reference Info. | IEICE Tech. Rep., vol. 109, no. 199, CAS2009-34, pp. 59-64, Sept. 2009. | |
| Paper # | CAS2009-34 | |
| Date of Issue | 2009-09-17 (CAS, NLP) | |
| ISSN | Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 | |
| Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) | |
| Download PDF | CAS2009-34 NLP2009-70 |
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| Conference Information | |
| Committee | CAS NLP |
| Conference Date | 2009-09-24 - 2009-09-25 |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Hiroshima Univ. Higashi Senda Campus |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Paper Information | |
| Registration To | CAS |
| Conference Code | 2009-09-CAS-NLP |
| Language | Japanese |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Massive-Parallel Memory-Embedded SIMD Processor Architecture |
| Sub Title (in English) | |
| Keyword(1) | Parallel processing |
| Keyword(2) | SIMD processor |
| Keyword(3) | Low power consumption |
| Keyword(4) | CAM |
| Keyword(5) | |
| Keyword(6) | JPEG compression |
| Keyword(7) | Face detection |
| Keyword(8) | |
| 1st Author's Name | Tetsushi Koide |
| 1st Author's Affiliation | Hiroshima University (Hiroshima Univ.) |
| 2nd Author's Name | Takeshi Kumaki |
| 2nd Author's Affiliation | Hiroshima University (Hiroshima Univ.) |
| 3rd Author's Name | Hans Juergen Mattausch |
| 3rd Author's Affiliation | Hiroshima University (Hiroshima Univ.) |
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| Speaker | Author-1 |
| Date Time | 2009-09-24 16:00:00 |
| Presentation Time | 55 minutes |
| Registration for | CAS |
| Paper # | CAS2009-34, NLP2009-70 |
| Volume (vol) | vol.109 |
| Number (no) | no.199(CAS), no.200(NLP) |
| Page | pp.59-64 |
| #Pages | 6 |
| Date of Issue | 2009-09-17 (CAS, NLP) |
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