Paper Abstract and Keywords |
Presentation |
2010-01-12 10:30
Fabricatioin and threshold voltage control of organic nonvolatile memory transistors Takashi Nakagawa, Tomoyuki Yokota, Tsuyoshi Sekitani, Ken Takeuchi (Tokyo Univ.), Ute Zschieschang, Hagen Klauk (MPI), Takao Someya (Tokyo Univ.) OME2009-67 Link to ES Tech. Rep. Archives: OME2009-67 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
We have demonstrated to control threshold voltage (Vth) of the organic floating-gate transistors using self-assembled monolayer (SAM) for realizing organic nonvolatile memory array. For programming, -6 V is applied between the control gate and the source contact. To erase, +3 V is applied to discharge the floating gate and recover the initial threshold voltage. The charge retention time was about 104 s. The difference between Vth on program-state and on erase-state (ΔVth) is one of the most important factors for data retention. In this work, with changing the thickness of organic semiconductor pentacene from 10 to 90 nm, ΔVth can be systematically changed from 1.6 to 3 V. |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
Organic nonvolatile memory / Floating-gate / Threshold voltage control / Self-assembled monolayer / / / / |
Reference Info. |
IEICE Tech. Rep., vol. 109, no. 359, OME2009-67, pp. 7-11, Jan. 2010. |
Paper # |
OME2009-67 |
Date of Issue |
2010-01-05 (OME) |
ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
Copyright and reproduction |
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OME2009-67 Link to ES Tech. Rep. Archives: OME2009-67 |
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