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Paper Abstract and Keywords
Presentation 2010-01-12 10:30
Fabricatioin and threshold voltage control of organic nonvolatile memory transistors
Takashi Nakagawa, Tomoyuki Yokota, Tsuyoshi Sekitani, Ken Takeuchi (Tokyo Univ.), Ute Zschieschang, Hagen Klauk (MPI), Takao Someya (Tokyo Univ.) OME2009-67 Link to ES Tech. Rep. Archives: OME2009-67
Abstract (in Japanese) (See Japanese page) 
(in English) We have demonstrated to control threshold voltage (Vth) of the organic floating-gate transistors using self-assembled monolayer (SAM) for realizing organic nonvolatile memory array. For programming, -6 V is applied between the control gate and the source contact. To erase, +3 V is applied to discharge the floating gate and recover the initial threshold voltage. The charge retention time was about 104 s. The difference between Vth on program-state and on erase-state (ΔVth) is one of the most important factors for data retention. In this work, with changing the thickness of organic semiconductor pentacene from 10 to 90 nm, ΔVth can be systematically changed from 1.6 to 3 V.
Keyword (in Japanese) (See Japanese page) 
(in English) Organic nonvolatile memory / Floating-gate / Threshold voltage control / Self-assembled monolayer / / / /  
Reference Info. IEICE Tech. Rep., vol. 109, no. 359, OME2009-67, pp. 7-11, Jan. 2010.
Paper # OME2009-67 
Date of Issue 2010-01-05 (OME) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
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All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF OME2009-67 Link to ES Tech. Rep. Archives: OME2009-67

Conference Information
Committee OME  
Conference Date 2010-01-12 - 2010-01-12 
Place (in Japanese) (See Japanese page) 
Place (in English) Kikai-Shinko-Kaikan Bldg. 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Sensor, device, etc. 
Paper Information
Registration To OME 
Conference Code 2010-01-OME 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Fabricatioin and threshold voltage control of organic nonvolatile memory transistors 
Sub Title (in English)  
Keyword(1) Organic nonvolatile memory  
Keyword(2) Floating-gate  
Keyword(3) Threshold voltage control  
Keyword(4) Self-assembled monolayer  
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1st Author's Name Takashi Nakagawa  
1st Author's Affiliation Tokyo University (Tokyo Univ.)
2nd Author's Name Tomoyuki Yokota  
2nd Author's Affiliation Tokyo University (Tokyo Univ.)
3rd Author's Name Tsuyoshi Sekitani  
3rd Author's Affiliation Tokyo University (Tokyo Univ.)
4th Author's Name Ken Takeuchi  
4th Author's Affiliation Tokyo University (Tokyo Univ.)
5th Author's Name Ute Zschieschang  
5th Author's Affiliation Max Planck Institute for Solid State Research (MPI)
6th Author's Name Hagen Klauk  
6th Author's Affiliation Max Planck Institute for Solid State Research (MPI)
7th Author's Name Takao Someya  
7th Author's Affiliation Tokyo University (Tokyo Univ.)
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Speaker Author-1 
Date Time 2010-01-12 10:30:00 
Presentation Time 25 minutes 
Registration for OME 
Paper # OME2009-67 
Volume (vol) vol.109 
Number (no) no.359 
Page pp.7-11 
#Pages
Date of Issue 2010-01-05 (OME) 


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