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Paper Abstract and Keywords
Presentation 2010-02-15 10:00
Study on a Test Generation Method for Transition Faults Using Multi Cycle Capture Test
Hiroshi Ogawa, Toshinori Hosokawa (Nihon Univ.), Masayoshi Yoshimura (Kyusyu Univ.), Koji Yamazaki (Meiji Univ.) DC2009-67
Abstract (in Japanese) (See Japanese page) 
(in English) Overtesting induces unnecessary yield loss. Untestable faults have no effect on normal functions of circuits. However, in scan testing, untestable faults may be detected through scan chains. Detected untestable faults cause overtesting. Untestable faults consist of uncontrollable faults, unobservable faults, and uncontrollable and unobservable faults. Uncontrollable faults may be detected under invalid states through scan chains by shift-in operations. Unobservable faults cannot be observed at primary outputs, but their effects may be propagated to scan flip-flops. Thus, unobservable faults may be detected through scan chains by shift-out operations. Several methods to reduce the number of detected untestable faults were recently proposed. These methods identify invalid states and generate test patterns avoiding invalid states. As the result, the number of detected uncontrollable faults was reduced. However, they cannot reduce the number of detected unobservable faults. In this paper, both uncontrollable and unobservable faults are identified using a multi-cycle capture test generation method. We evaluate the relationship between the numbers of untestable faults and the fault excitation time for ISCAS’89 benchmark circuits, and also evaluate factors that untestable faults are identified.
Keyword (in Japanese) (See Japanese page) 
(in English) transition faults / over testing / time expansion models / multi-cycle capture test / untestable faults / / /  
Reference Info. IEICE Tech. Rep., vol. 109, no. 416, DC2009-67, pp. 13-18, Feb. 2010.
Paper # DC2009-67 
Date of Issue 2010-02-08 (DC) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
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reproduction
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
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Conference Information
Committee DC  
Conference Date 2010-02-15 - 2010-02-15 
Place (in Japanese) (See Japanese page) 
Place (in English) Kikai-Shinko-Kaikan Bldg. 
Topics (in Japanese) (See Japanese page) 
Topics (in English)  
Paper Information
Registration To DC 
Conference Code 2010-02-DC 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Study on a Test Generation Method for Transition Faults Using Multi Cycle Capture Test 
Sub Title (in English)  
Keyword(1) transition faults  
Keyword(2) over testing  
Keyword(3) time expansion models  
Keyword(4) multi-cycle capture test  
Keyword(5) untestable faults  
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1st Author's Name Hiroshi Ogawa  
1st Author's Affiliation Nihon University (Nihon Univ.)
2nd Author's Name Toshinori Hosokawa  
2nd Author's Affiliation Nihon University (Nihon Univ.)
3rd Author's Name Masayoshi Yoshimura  
3rd Author's Affiliation Kyusyu University (Kyusyu Univ.)
4th Author's Name Koji Yamazaki  
4th Author's Affiliation Meiji University (Meiji Univ.)
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Speaker Author-1 
Date Time 2010-02-15 10:00:00 
Presentation Time 25 minutes 
Registration for DC 
Paper # DC2009-67 
Volume (vol) vol.109 
Number (no) no.416 
Page pp.13-18 
#Pages
Date of Issue 2010-02-08 (DC) 


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