Paper Abstract and Keywords |
Presentation |
2010-03-11 16:05
Evaluation of a Detail Via Arrangement Method for 2-Layer Ball Grid Array Packages Masaki Kinoshita (Tokyo Inst. of Tech.), Yoichi Tomioka (Tokyo Univ. of Agr and Tech.), Atsushi Takahashi (Osaka Univ.) VLD2009-117 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
It takes a lot of time to obtain a routing design of the ball grid array (BGA) package which is one of LSI package, since for example, high density routing is requested. Therefore, BGA package routing automation is required in industry. Although the routing feasibility is improved by the methods proposed for obtaining a global routing pattern, a detail via arrangement that determines the detailed position of each via within the assigned area to meet the global routing pattern of each layer should be appropriately determined to apply the obtained pattern to actual packages.
In this paper, we evaluate the detail via arrangement method proposed in our previous work. In experiments, it is confirmed that our proposed method obtains a detailed via arrangement in affordable time. |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
BGA package / package routing / detail via arrangement / / / / / |
Reference Info. |
IEICE Tech. Rep., vol. 109, no. 462, VLD2009-117, pp. 109-114, March 2010. |
Paper # |
VLD2009-117 |
Date of Issue |
2010-03-03 (VLD) |
ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
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VLD2009-117 |
Conference Information |
Committee |
VLD |
Conference Date |
2010-03-10 - 2010-03-12 |
Place (in Japanese) |
(See Japanese page) |
Place (in English) |
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Topics (in Japanese) |
(See Japanese page) |
Topics (in English) |
Design Technology for System-on-Silicon |
Paper Information |
Registration To |
VLD |
Conference Code |
2010-03-VLD |
Language |
Japanese |
Title (in Japanese) |
(See Japanese page) |
Sub Title (in Japanese) |
(See Japanese page) |
Title (in English) |
Evaluation of a Detail Via Arrangement Method for 2-Layer Ball Grid Array Packages |
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BGA package |
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package routing |
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detail via arrangement |
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1st Author's Name |
Masaki Kinoshita |
1st Author's Affiliation |
Tokyo Institute Technology (Tokyo Inst. of Tech.) |
2nd Author's Name |
Yoichi Tomioka |
2nd Author's Affiliation |
Tokyo University of Agriculture and Technology (Tokyo Univ. of Agr and Tech.) |
3rd Author's Name |
Atsushi Takahashi |
3rd Author's Affiliation |
Osaka University (Osaka Univ.) |
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Speaker |
Author-1 |
Date Time |
2010-03-11 16:05:00 |
Presentation Time |
25 minutes |
Registration for |
VLD |
Paper # |
VLD2009-117 |
Volume (vol) |
vol.109 |
Number (no) |
no.462 |
Page |
pp.109-114 |
#Pages |
6 |
Date of Issue |
2010-03-03 (VLD) |
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