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Paper Abstract and Keywords
Presentation 2010-06-21 11:40
Layout-Aware Variation Modeling and Its Application to Opamp Design
Kouta Shinohara, Mihoko Hidaka, Qing Dong, Jing Li, Shigetoshi Nakatake (Univ. of Kitakyushu) CAS2010-7 VLD2010-17 SIP2010-28 CST2010-7
Abstract (in Japanese) (See Japanese page) 
(in English) As geometrical scaling of the transistor dimensions, such as feature
size and supply voltage, has dominated the semiconductor industry
for greater chip density, the variation analysis of transistor
characteristic also becomes more critical important for analog
integrated circuit design. In this paper, we present a model for the
layout structure dependent variation according to the variation data
got from a TEG(test element group) chip, then a correlation analysis
is made between the result of Monte Carlo analysis based on this
model and the experimental verification result for the offset
voltage variation in a 90nm Op-Amp.
Keyword (in Japanese) (See Japanese page) 
(in English) analog layout design / layout-aware variation / Monte Carlo analysis / Op-Amp design / / / /  
Reference Info. IEICE Tech. Rep., vol. 110, no. 87, VLD2010-17, pp. 37-41, June 2010.
Paper # VLD2010-17 
Date of Issue 2010-06-14 (CAS, VLD, SIP, CST) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
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reproduction
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF CAS2010-7 VLD2010-17 SIP2010-28 CST2010-7

Conference Information
Committee CAS MSS VLD SIP  
Conference Date 2010-06-21 - 2010-06-22 
Place (in Japanese) (See Japanese page) 
Place (in English) Kitami Institute of Technology 
Topics (in Japanese) (See Japanese page) 
Topics (in English)  
Paper Information
Registration To VLD 
Conference Code 2010-06-CAS-CST-VLD-SIP 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Layout-Aware Variation Modeling and Its Application to Opamp Design 
Sub Title (in English)  
Keyword(1) analog layout design  
Keyword(2) layout-aware variation  
Keyword(3) Monte Carlo analysis  
Keyword(4) Op-Amp design  
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1st Author's Name Kouta Shinohara  
1st Author's Affiliation The University of Kitakyushu (Univ. of Kitakyushu)
2nd Author's Name Mihoko Hidaka  
2nd Author's Affiliation The University of Kitakyushu (Univ. of Kitakyushu)
3rd Author's Name Qing Dong  
3rd Author's Affiliation The University of Kitakyushu (Univ. of Kitakyushu)
4th Author's Name Jing Li  
4th Author's Affiliation The University of Kitakyushu (Univ. of Kitakyushu)
5th Author's Name Shigetoshi Nakatake  
5th Author's Affiliation The University of Kitakyushu (Univ. of Kitakyushu)
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Speaker Author-1 
Date Time 2010-06-21 11:40:00 
Presentation Time 25 minutes 
Registration for VLD 
Paper # CAS2010-7, VLD2010-17, SIP2010-28, CST2010-7 
Volume (vol) vol.110 
Number (no) no.86(CAS), no.87(VLD), no.88(SIP), no.89(CST) 
Page pp.37-41 
#Pages
Date of Issue 2010-06-14 (CAS, VLD, SIP, CST) 


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