IEICE Technical Committee Submission System
Conference Paper's Information
Online Proceedings
[Sign in]
Tech. Rep. Archives
 Go Top Page Go Previous   [Japanese] / [English] 

Paper Abstract and Keywords
Presentation 2011-01-18 17:05
Design of Dataflow Machine on Multiple FPGAs
Kenta Inakagata, Hirokazu Morishita (Keio Univ.), Yasunori Osana (Seikei Univ.), Naoyuki Fujita (JAXA), Hideharu Amano (Keio Univ.) VLD2010-115 CPSY2010-70 RECONF2010-84
Abstract (in Japanese) (See Japanese page) 
(in English) Recently, computational science has been utilized in various eld such as physics, chemistry and economics. Since the computation includes numerous floating point operations, the applications are often run on a custom computing machine. As improving technology, FPGA, one of the recon gurable devices, has been taken notice as solution for an accelerator because of its cost and flexibility. However, to implement an application on FPGA is still burden for researchers of theory. Then, in this work, a streaming processing system which calculate along dataflow by ALU array is proposed and designed. This work aims at facilitating implementation of application on FPGA and also aims at estimating performance of the custom computing machine. By evaluating with MUSCL, method for accuracy in CFD, it's found that about 4.1 times faster performance will be expected against execution on Intel Core 2Duo at 2.4 GHz and pipeline utilization ratio strongly influence performance against a custom computing machine.
Keyword (in Japanese) (See Japanese page) 
(in English) Multiple FPGAs / Stream processing / / / / / /  
Reference Info. IEICE Tech. Rep., vol. 110, no. 362, RECONF2010-84, pp. 205-210, Jan. 2011.
Paper # RECONF2010-84 
Date of Issue 2011-01-10 (VLD, CPSY, RECONF) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF VLD2010-115 CPSY2010-70 RECONF2010-84

Conference Information
Committee RECONF VLD CPSY IPSJ-SLDM  
Conference Date 2011-01-17 - 2011-01-18 
Place (in Japanese) (See Japanese page) 
Place (in English) Keio Univ (Hiyoshi Campus) 
Topics (in Japanese) (See Japanese page) 
Topics (in English) FPGA Applications, etc 
Paper Information
Registration To RECONF 
Conference Code 2011-01-RECONF-VLD-CPSY-SLDM 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Design of Dataflow Machine on Multiple FPGAs 
Sub Title (in English)  
Keyword(1) Multiple FPGAs  
Keyword(2) Stream processing  
Keyword(3)  
Keyword(4)  
Keyword(5)  
Keyword(6)  
Keyword(7)  
Keyword(8)  
1st Author's Name Kenta Inakagata  
1st Author's Affiliation Keio University (Keio Univ.)
2nd Author's Name Hirokazu Morishita  
2nd Author's Affiliation Keio University (Keio Univ.)
3rd Author's Name Yasunori Osana  
3rd Author's Affiliation Seikei University (Seikei Univ.)
4th Author's Name Naoyuki Fujita  
4th Author's Affiliation Japan Aerospace Exploration Agency (JAXA)
5th Author's Name Hideharu Amano  
5th Author's Affiliation Keio University (Keio Univ.)
6th Author's Name  
6th Author's Affiliation ()
7th Author's Name  
7th Author's Affiliation ()
8th Author's Name  
8th Author's Affiliation ()
9th Author's Name  
9th Author's Affiliation ()
10th Author's Name  
10th Author's Affiliation ()
11th Author's Name  
11th Author's Affiliation ()
12th Author's Name  
12th Author's Affiliation ()
13th Author's Name  
13th Author's Affiliation ()
14th Author's Name  
14th Author's Affiliation ()
15th Author's Name  
15th Author's Affiliation ()
16th Author's Name  
16th Author's Affiliation ()
17th Author's Name  
17th Author's Affiliation ()
18th Author's Name  
18th Author's Affiliation ()
19th Author's Name  
19th Author's Affiliation ()
20th Author's Name  
20th Author's Affiliation ()
Speaker Author-1 
Date Time 2011-01-18 17:05:00 
Presentation Time 20 minutes 
Registration for RECONF 
Paper # VLD2010-115, CPSY2010-70, RECONF2010-84 
Volume (vol) vol.110 
Number (no) no.360(VLD), no.361(CPSY), no.362(RECONF) 
Page pp.205-210 
#Pages
Date of Issue 2011-01-10 (VLD, CPSY, RECONF) 


[Return to Top Page]

[Return to IEICE Web Page]


The Institute of Electronics, Information and Communication Engineers (IEICE), Japan