Paper Abstract and Keywords |
Presentation |
2011-01-18 09:00
A Regular Expression Matching Circuit Based on Decomposed Automaton Hiroki Nakahara, Tsutomu Sasao, Munehiro Matsuura (KIT) VLD2010-98 CPSY2010-53 RECONF2010-67 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
In this paper, we propose a regular expression matching circuit based on
a decomposed automaton.
To implement regular expressions on the hardware,
first, we convert them to a non-deterministic finite automaton~(NFA).
Then, to reduce the number of states,
we convert the NFA into a modular non-deterministic finite automaton
with unbounded multi-character transition~(MNFAU).
Next, to realize it by a feasible amount of the hardware,
we decompose the MNFAU into the deterministic finite automaton~(DFA) and the NFA.
The DFA part is implemented by an off-chip memory and
a simple sequenser, while the NFA part is implemented by a cascade
of logic cells.
Also, this paper shows that the MNFAU based implementation is superior to the DFA and the NFA based ones,
with respect to the area and time complexity. |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
Regular Expression / NFA / DFA / MNFAU / FPGA / Pattern Matching / / |
Reference Info. |
IEICE Tech. Rep., vol. 110, no. 362, RECONF2010-67, pp. 105-110, Jan. 2011. |
Paper # |
RECONF2010-67 |
Date of Issue |
2011-01-10 (VLD, CPSY, RECONF) |
ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
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VLD2010-98 CPSY2010-53 RECONF2010-67 |
Conference Information |
Committee |
RECONF VLD CPSY IPSJ-SLDM |
Conference Date |
2011-01-17 - 2011-01-18 |
Place (in Japanese) |
(See Japanese page) |
Place (in English) |
Keio Univ (Hiyoshi Campus) |
Topics (in Japanese) |
(See Japanese page) |
Topics (in English) |
FPGA Applications, etc |
Paper Information |
Registration To |
RECONF |
Conference Code |
2011-01-RECONF-VLD-CPSY-SLDM |
Language |
Japanese |
Title (in Japanese) |
(See Japanese page) |
Sub Title (in Japanese) |
(See Japanese page) |
Title (in English) |
A Regular Expression Matching Circuit Based on Decomposed Automaton |
Sub Title (in English) |
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Keyword(1) |
Regular Expression |
Keyword(2) |
NFA |
Keyword(3) |
DFA |
Keyword(4) |
MNFAU |
Keyword(5) |
FPGA |
Keyword(6) |
Pattern Matching |
Keyword(7) |
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Keyword(8) |
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1st Author's Name |
Hiroki Nakahara |
1st Author's Affiliation |
Kyushu Institute Of Technology (KIT) |
2nd Author's Name |
Tsutomu Sasao |
2nd Author's Affiliation |
Kyushu Institute Of Technology (KIT) |
3rd Author's Name |
Munehiro Matsuura |
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Kyushu Institute Of Technology (KIT) |
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Speaker |
Author-1 |
Date Time |
2011-01-18 09:00:00 |
Presentation Time |
20 minutes |
Registration for |
RECONF |
Paper # |
VLD2010-98, CPSY2010-53, RECONF2010-67 |
Volume (vol) |
vol.110 |
Number (no) |
no.360(VLD), no.361(CPSY), no.362(RECONF) |
Page |
pp.105-110 |
#Pages |
6 |
Date of Issue |
2011-01-10 (VLD, CPSY, RECONF) |
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