Paper Abstract and Keywords |
Presentation |
2011-02-07 15:25
Development of Low Temperature Bump-less TSV Process in 3D Stacking Technology Hideki Kitada, Nobuhide Maeda (The Univ. of Tokyo), Koji Fujimoto (Dai Nippon Printing), Yoriko Mizushima, Yoshihiro Nakata, Tomoji Nakamura (Fujitsu Laboratories Ltd.), Takayuki Ohba (The Univ. of Tokyo) SDM2010-224 Link to ES Tech. Rep. Archives: SDM2010-224 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
Diffusion behavior of Cu in Cu through-silicon-vias (TSVs) fabricated using low-temperature plasma enhanced chemical vapor deposition (LT-PECVD) has been evaluated. Silicon oxy-nitride (SiON) barrier films were formed by LT-PECVD at 150°C. Cu diffusion rate was found to increase with decreasing film density. The critical density and thickness for prevention of Cu diffusion into Si substrate have been estimated. In case of a film with density >60% of the bulk value and/or thickness >100 nm, no change of electrical resistance for stacked wafers containing TSVs was observed after 1000 cycles of thermal stress. According to above results, SiON film formed at 150°C can be used for the TSV process without any degradation of electrical characteristics and reliability, enabling a reduction in total process temperature in the wafer-on-wafer technology. |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
3D-IC / TSV / LT-PECVD / Diffusion barrier / BS-SIMS / XPS / Film density / |
Reference Info. |
IEICE Tech. Rep., vol. 110, no. 408, SDM2010-224, pp. 49-53, Feb. 2011. |
Paper # |
SDM2010-224 |
Date of Issue |
2011-01-31 (SDM) |
ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
Copyright and reproduction |
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SDM2010-224 Link to ES Tech. Rep. Archives: SDM2010-224 |