Paper Abstract and Keywords |
Presentation |
2011-05-13 13:55
A Homogeneous Routing Architecture for Efficient FPGA Design Kazuki Inoue, Motoki Amagasaki, Masahiro Iida, Toshinori Sueyoshi (Kumamoto Univ.) RECONF2011-19 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
In previous work, we have designed a prototype chip of island-style FPGA architecture. This architecture has very complex programmable interconnects. They make difficult to design, verify, and test on the prototype chip. For this reason, developement costs will be increased. In order to resolve this problem, we propose new FPGA architecture. There are two features in our architecture. One feature is that our architecture has only a few kinds of tile modules. Another is that our architecture has very simple interconnects. As a result, our proposed architecture brought to save development time. Further, there were little penalties of area and delay even though our architecture is very simple. |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
Easily design / Homogeneous routing architecture / / / / / / |
Reference Info. |
IEICE Tech. Rep., vol. 111, no. 31, RECONF2011-19, pp. 109-114, May 2011. |
Paper # |
RECONF2011-19 |
Date of Issue |
2011-05-05 (RECONF) |
ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
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RECONF2011-19 |
Conference Information |
Committee |
RECONF |
Conference Date |
2011-05-12 - 2011-05-13 |
Place (in Japanese) |
(See Japanese page) |
Place (in English) |
Hokkaido Univ. (Faculty of Eng., B3 Bldg.) |
Topics (in Japanese) |
(See Japanese page) |
Topics (in English) |
Reconfigurable Systems, etc. |
Paper Information |
Registration To |
RECONF |
Conference Code |
2011-05-RECONF |
Language |
Japanese |
Title (in Japanese) |
(See Japanese page) |
Sub Title (in Japanese) |
(See Japanese page) |
Title (in English) |
A Homogeneous Routing Architecture for Efficient FPGA Design |
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Easily design |
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Homogeneous routing architecture |
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1st Author's Name |
Kazuki Inoue |
1st Author's Affiliation |
Kumamoto University (Kumamoto Univ.) |
2nd Author's Name |
Motoki Amagasaki |
2nd Author's Affiliation |
Kumamoto University (Kumamoto Univ.) |
3rd Author's Name |
Masahiro Iida |
3rd Author's Affiliation |
Kumamoto University (Kumamoto Univ.) |
4th Author's Name |
Toshinori Sueyoshi |
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Kumamoto University (Kumamoto Univ.) |
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Speaker |
Author-1 |
Date Time |
2011-05-13 13:55:00 |
Presentation Time |
25 minutes |
Registration for |
RECONF |
Paper # |
RECONF2011-19 |
Volume (vol) |
vol.111 |
Number (no) |
no.31 |
Page |
pp.109-114 |
#Pages |
6 |
Date of Issue |
2011-05-05 (RECONF) |
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