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Paper Abstract and Keywords
Presentation 2011-07-26 11:25
A Pulsed Neuron Model for Hardware Implementation without Multiplier
Yusuke Hosoi, Kazunori Matsuo (Kumamoto-nct), Norihiro Kurokawa, Hiroyasu Yamamoto (Techno Design), Minoru Motoki (Kumamoto-nct) NC2011-36
Abstract (in Japanese) (See Japanese page) 
(in English) The neural network has a problem about response time. Therefore it is necessary to become hardware. Iwata, et al proposed a pulsed neuron model for hardware and succeeded in decreasing circuit scale without using multiplier in execution process. However, a multiplier is used in learning process and some circuit scale was required. We propose a learning rule of the pulsed neuronal model without multiplier in learning process for hardware. And we report that performance of the proposed method by computer simulation.
Keyword (in Japanese) (See Japanese page) 
(in English) Neural Network / Hardware Implementation / Pulsed Neuron / Learning Rule / Pattern Recognition / / /  
Reference Info. IEICE Tech. Rep., vol. 111, no. 157, NC2011-36, pp. 87-92, July 2011.
Paper # NC2011-36 
Date of Issue 2011-07-18 (NC) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF NC2011-36

Conference Information
Committee NC  
Conference Date 2011-07-25 - 2011-07-26 
Place (in Japanese) (See Japanese page) 
Place (in English) Graduate School of Engineering, Kobe University 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Intelligent systems and general 
Paper Information
Registration To NC 
Conference Code 2011-07-NC 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) A Pulsed Neuron Model for Hardware Implementation without Multiplier 
Sub Title (in English)  
Keyword(1) Neural Network  
Keyword(2) Hardware Implementation  
Keyword(3) Pulsed Neuron  
Keyword(4) Learning Rule  
Keyword(5) Pattern Recognition  
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1st Author's Name Yusuke Hosoi  
1st Author's Affiliation Kumamoto National College of Technology (Kumamoto-nct)
2nd Author's Name Kazunori Matsuo  
2nd Author's Affiliation Kumamoto National College of Technology (Kumamoto-nct)
3rd Author's Name Norihiro Kurokawa  
3rd Author's Affiliation Techno Design (Techno Design)
4th Author's Name Hiroyasu Yamamoto  
4th Author's Affiliation Techno Design (Techno Design)
5th Author's Name Minoru Motoki  
5th Author's Affiliation Kumamoto National College of Technology (Kumamoto-nct)
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Speaker Author-1 
Date Time 2011-07-26 11:25:00 
Presentation Time 25 minutes 
Registration for NC 
Paper # NC2011-36 
Volume (vol) vol.111 
Number (no) no.157 
Page pp.87-92 
#Pages
Date of Issue 2011-07-18 (NC) 


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