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| Presentation | 2011-10-21 13:30 Compensation of Voltage Unbalance in Series-Connected Voltage Balancing Circuit with Voltage Balance Monitor Toshiki Kishi, Yohtaro Umeda (TUS)  CAS2011-55 NLP2011-82 |
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| Abstract | (in Japanese) | (See Japanese page) |
| (in English) | In recent years, design of driver circuits for optical modulator in fiber-optic communication system or light emitting diode (LED) in visible light communication system becomes increasingly difficult. This is due to the breakdown voltage decrease in recent miniaturized transistors for the purpose of high-speed operation and high-integration. The series-connected voltage balancing (SCVB) circuit is studied so as to solve this problem. The voltage swing of n-stage SCVB circuit outputs n-times voltage swing of that for a single transistor. However, the balance of voltage swings of the transistors used in SCVB circuit loses due to the back-gate modulation caused by the body effect if the SCVB circuit is applied to CMOS process. In this study, we propose a technique of voltage balancing in SCVB circuit with a voltage balance monitor. A monitor terminal is attached to the drain of the lower transistor in the two-stage SCVB circuit fabricated with 0.18-μm CMOS process thorough a high resistance. With calibrating the voltage at the monitor terminal and monitoring the drain voltage waveform of the lower transistor, the output voltage of the SCVB circuit is demonstrated to be divided by the two series-connected transistors equally. | |
| Keyword | (in Japanese) | (See Japanese page) |
| (in English) | series-connected voltage balancing circuit (SCVB) / CMOS / body effect / visible light communication / driver / / / | |
| Reference Info. | IEICE Tech. Rep., vol. 111, no. 242, CAS2011-55, pp. 129-134, Oct. 2011. | |
| Paper # | CAS2011-55 | |
| Date of Issue | 2011-10-13 (CAS, NLP) | |
| ISSN | Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 | |
| Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) | |
| Download PDF | CAS2011-55 NLP2011-82 |
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| Conference Information | |
| Committee | CAS NLP |
| Conference Date | 2011-10-20 - 2011-10-21 |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Shizuoka Univ. |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | Circuit and System, etc. |
| Paper Information | |
| Registration To | CAS |
| Conference Code | 2011-10-CAS-NLP |
| Language | Japanese |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Compensation of Voltage Unbalance in Series-Connected Voltage Balancing Circuit with Voltage Balance Monitor |
| Sub Title (in English) | |
| Keyword(1) | series-connected voltage balancing circuit (SCVB) |
| Keyword(2) | CMOS |
| Keyword(3) | body effect |
| Keyword(4) | visible light communication |
| Keyword(5) | driver |
| Keyword(6) | |
| Keyword(7) | |
| Keyword(8) | |
| 1st Author's Name | Toshiki Kishi |
| 1st Author's Affiliation | Tokyo University of Science (TUS) |
| 2nd Author's Name | Yohtaro Umeda |
| 2nd Author's Affiliation | Tokyo University of Science (TUS) |
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| Speaker | Author-1 |
| Date Time | 2011-10-21 13:30:00 |
| Presentation Time | 25 minutes |
| Registration for | CAS |
| Paper # | CAS2011-55, NLP2011-82 |
| Volume (vol) | vol.111 |
| Number (no) | no.242(CAS), no.243(NLP) |
| Page | pp.129-134 |
| #Pages | 6 |
| Date of Issue | 2011-10-13 (CAS, NLP) |
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