| IEICE Technical Committee Submission System Conference Paper's Information |
Online Proceedings [Sign in] Tech. Rep. Archives |
| Go Top Page | Go Previous | [Japanese] / [English] |
| Paper Abstract and Keywords | ||
| Presentation | 2011-11-30 11:20 Power-Gating Circuit Scheme for Transient-Glitch Energy Reduction Yuya Ohta, Masaru Kudo, Kimiyoshi Usami (Shibaura Institute of Tech.)  VLD2011-90 DC2011-66 |
|
| Abstract | (in Japanese) | (See Japanese page) |
| (in English) | In fine-grain power gating which performs cell-by-cell power gating (PG) , energy overhead consumed at sleep-in and sleep-out becomes a problem. It has been reported that energy consumption due to transient-glitch which occurs at the sleep-out occupies the large share in the whole energy dissipation. This paper proposes a novel PG circuit scheme to reduce transient-glitch energy. Reduction of transient-glitch energy leads to shortening the Break Even Cycle (BEC) which is the minimum idle cycles required to get energy saving in fine-grain PG. We evaluated BEC by applying the proposed scheme. Circuit simulations were performed using the cell library of the e-Shuttle 65nm process technology. Results have demonstrated the BEC is reduced by 31% in ALU and by 39% in Multiplier at 25 degrees C by applying our scheme. Reduction in BEC gives the benefit that energy reduction can be obtained at shorter idle cycles. |
|
| Keyword | (in Japanese) | (See Japanese page) |
| (in English) | Fine Grain Power Gating / Transient Glitch / Circuit Scheme / MTCMOS Circuits / / / / | |
| Reference Info. | IEICE Tech. Rep., vol. 111, no. 324, VLD2011-90, pp. 221-226, Nov. 2011. | |
| Paper # | VLD2011-90 | |
| Date of Issue | 2011-11-21 (VLD, DC) | |
| ISSN | Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 | |
| Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) | |
| Download PDF | VLD2011-90 DC2011-66 |
|
| Conference Information | |
| Committee | VLD DC IPSJ-SLDM CPSY RECONF ICD CPM |
| Conference Date | 2011-11-28 - 2011-11-30 |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | NewWelCity Miyazaki |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | Design Gaia 2010 -New Field of VLSI Design- |
| Paper Information | |
| Registration To | VLD |
| Conference Code | 2011-11-VLD-DC-SLDM-CPSY-RECONF-ICD-CPM |
| Language | Japanese |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Power-Gating Circuit Scheme for Transient-Glitch Energy Reduction |
| Sub Title (in English) | |
| Keyword(1) | Fine Grain Power Gating |
| Keyword(2) | Transient Glitch |
| Keyword(3) | Circuit Scheme |
| Keyword(4) | MTCMOS Circuits |
| Keyword(5) | |
| Keyword(6) | |
| Keyword(7) | |
| Keyword(8) | |
| 1st Author's Name | Yuya Ohta |
| 1st Author's Affiliation | Shibaura Institute of Technology (Shibaura Institute of Tech.) |
| 2nd Author's Name | Masaru Kudo |
| 2nd Author's Affiliation | Shibaura Institute of Technology (Shibaura Institute of Tech.) |
| 3rd Author's Name | Kimiyoshi Usami |
| 3rd Author's Affiliation | Shibaura Institute of Technology (Shibaura Institute of Tech.) |
| 4th Author's Name | |
| 4th Author's Affiliation | () |
| 5th Author's Name | |
| 5th Author's Affiliation | () |
| 6th Author's Name | |
| 6th Author's Affiliation | () |
| 7th Author's Name | |
| 7th Author's Affiliation | () |
| 8th Author's Name | |
| 8th Author's Affiliation | () |
| 9th Author's Name | |
| 9th Author's Affiliation | () |
| 10th Author's Name | |
| 10th Author's Affiliation | () |
| 11th Author's Name | |
| 11th Author's Affiliation | () |
| 12th Author's Name | |
| 12th Author's Affiliation | () |
| 13th Author's Name | |
| 13th Author's Affiliation | () |
| 14th Author's Name | |
| 14th Author's Affiliation | () |
| 15th Author's Name | |
| 15th Author's Affiliation | () |
| 16th Author's Name | |
| 16th Author's Affiliation | () |
| 17th Author's Name | |
| 17th Author's Affiliation | () |
| 18th Author's Name | |
| 18th Author's Affiliation | () |
| Speaker | Author-1 |
| Date Time | 2011-11-30 11:20:00 |
| Presentation Time | 25 minutes |
| Registration for | VLD |
| Paper # | VLD2011-90, DC2011-66 |
| Volume (vol) | vol.111 |
| Number (no) | no.324(VLD), no.325(DC) |
| Page | pp.221-226 |
| #Pages | 6 |
| Date of Issue | 2011-11-21 (VLD, DC) |
[Return to Top Page]