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Paper Abstract and Keywords
Presentation 2012-03-06 11:00
LSI Implementation of Heterogeneous Multi-Chip Processor for energy-saving Embedded Systems : COOL Chip
Hiroyuki Uchida, Michiya Hagimoto, Tomoyuki Morimoto, Nobuyuki Hikichi, Yukoh Matsumoto (TOPS Systems), Fumito Imura, Naoya Watanabe, Katsuya Kikuchi, Motohiro Suzuki, Hiroshi Nakagawa, Masahiro Aoyagi (AIST) VLD2011-122
Abstract (in Japanese) (See Japanese page) 
(in English) The authors have suggested the low-power embedded heterogeneous multi-chip processor system: COOL Chip. We designed two prototype chips based on COOL Chip technology. Each chip has divided into more than 20 power domains so as to be able to observe dynamic power profile during application execution. This article describes the power evaluation method of COOL Chip prototype chips and the effectiveness for system-level power modeling.
Keyword (in Japanese) (See Japanese page) 
(in English) Heterogeneous Multi-core Processor / System-Level Power Modeling / / / / / /  
Reference Info. IEICE Tech. Rep., vol. 111, no. 450, VLD2011-122, pp. 13-17, March 2012.
Paper # VLD2011-122 
Date of Issue 2012-02-28 (VLD) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
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reproduction
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
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Conference Information
Committee VLD  
Conference Date 2012-03-06 - 2012-03-07 
Place (in Japanese) (See Japanese page) 
Place (in English) B-con Plaza 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Design Methodologies for System-on-a-chip 
Paper Information
Registration To VLD 
Conference Code 2012-03-VLD 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) LSI Implementation of Heterogeneous Multi-Chip Processor for energy-saving Embedded Systems : COOL Chip 
Sub Title (in English)  
Keyword(1) Heterogeneous Multi-core Processor  
Keyword(2) System-Level Power Modeling  
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1st Author's Name Hiroyuki Uchida  
1st Author's Affiliation TOPS Systems Corporation (TOPS Systems)
2nd Author's Name Michiya Hagimoto  
2nd Author's Affiliation TOPS Systems Corporation (TOPS Systems)
3rd Author's Name Tomoyuki Morimoto  
3rd Author's Affiliation TOPS Systems Corporation (TOPS Systems)
4th Author's Name Nobuyuki Hikichi  
4th Author's Affiliation TOPS Systems Corporation (TOPS Systems)
5th Author's Name Yukoh Matsumoto  
5th Author's Affiliation TOPS Systems Corporation (TOPS Systems)
6th Author's Name Fumito Imura  
6th Author's Affiliation National Institute of Advanced Industrial Science and Technology (AIST)
7th Author's Name Naoya Watanabe  
7th Author's Affiliation National Institute of Advanced Industrial Science and Technology (AIST)
8th Author's Name Katsuya Kikuchi  
8th Author's Affiliation National Institute of Advanced Industrial Science and Technology (AIST)
9th Author's Name Motohiro Suzuki  
9th Author's Affiliation National Institute of Advanced Industrial Science and Technology (AIST)
10th Author's Name Hiroshi Nakagawa  
10th Author's Affiliation National Institute of Advanced Industrial Science and Technology (AIST)
11th Author's Name Masahiro Aoyagi  
11th Author's Affiliation National Institute of Advanced Industrial Science and Technology (AIST)
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Speaker Author-1 
Date Time 2012-03-06 11:00:00 
Presentation Time 25 minutes 
Registration for VLD 
Paper # VLD2011-122 
Volume (vol) vol.111 
Number (no) no.450 
Page pp.13-17 
#Pages
Date of Issue 2012-02-28 (VLD) 


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