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Paper Abstract and Keywords
Presentation 2012-05-29 11:00
Development of a demonstration system for Ultra-low-power FPGA with Fine-Grained Field-Programmable Threshold Voltage Control
Takashi Kawanami (KIT), Masakazu Hioki (AIST), Yohei Matsumoto (Kaiyo Univ.), Toshiyuki Tsutsumi (Meiji Univ.), Tadashi Nakagawa, Toshihiro Sekigawa, Hanpei Koike (AIST) RECONF2012-5
Abstract (in Japanese) (See Japanese page) 
(in English) The Flex Power FPGA is a new FPGA architecture which enabled high speed operation and low power-consumption by fine-grained field-programmable threshold voltage control. This paper focuses on a demonstration system for the Flex Power FPGA.

FPGA, Low-Power, CAD, Demonstration System
Keyword (in Japanese) (See Japanese page) 
(in English) FPGA / Low-Power / CAD / Demonstration System / / / /  
Reference Info. IEICE Tech. Rep., vol. 112, no. 70, RECONF2012-5, pp. 25-30, May 2012.
Paper # RECONF2012-5 
Date of Issue 2012-05-22 (RECONF) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Notes on Review This article is a technical report without peer review, and its polished version will be published elsewhere.
Download PDF RECONF2012-5

Conference Information
Committee RECONF  
Conference Date 2012-05-29 - 2012-05-30 
Place (in Japanese) (See Japanese page) 
Place (in English) Tiruru (Naha Okinawa, Japan) 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Reconfigurable Systems, etc. 
Paper Information
Registration To RECONF 
Conference Code 2012-05-RECONF 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Development of a demonstration system for Ultra-low-power FPGA with Fine-Grained Field-Programmable Threshold Voltage Control 
Sub Title (in English)  
Keyword(1) FPGA  
Keyword(2) Low-Power  
Keyword(3) CAD  
Keyword(4) Demonstration System  
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Keyword(8)  
1st Author's Name Takashi Kawanami  
1st Author's Affiliation Kanazawa Institute of Technology (KIT)
2nd Author's Name Masakazu Hioki  
2nd Author's Affiliation National Institute of Advanced Industrial Science and Technology (AIST)
3rd Author's Name Yohei Matsumoto  
3rd Author's Affiliation Tokyo University of Marine Science and Technology (Kaiyo Univ.)
4th Author's Name Toshiyuki Tsutsumi  
4th Author's Affiliation Meiji University (Meiji Univ.)
5th Author's Name Tadashi Nakagawa  
5th Author's Affiliation National Institute of Advanced Industrial Science and Technology (AIST)
6th Author's Name Toshihiro Sekigawa  
6th Author's Affiliation National Institute of Advanced Industrial Science and Technology (AIST)
7th Author's Name Hanpei Koike  
7th Author's Affiliation National Institute of Advanced Industrial Science and Technology (AIST)
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Speaker Author-1 
Date Time 2012-05-29 11:00:00 
Presentation Time 25 minutes 
Registration for RECONF 
Paper # RECONF2012-5 
Volume (vol) vol.112 
Number (no) no.70 
Page pp.25-30 
#Pages
Date of Issue 2012-05-22 (RECONF) 


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