IEICE Technical Committee Submission System
Conference Paper's Information
Online Proceedings
[Sign in]
Tech. Rep. Archives
 Go Top Page Go Previous   [Japanese] / [English] 

Paper Abstract and Keywords
Presentation 2012-07-28 14:20
Global Load Instruction Aggregation Considering Dimensions of Arrays
Yasunobu Sumikawa, Munehiro Takimoto (TUS) SS2012-29 KBSE2012-31
Abstract (in Japanese) (See Japanese page) 
(in English) Most of modern processors have some much faster cache memories than a main memory, and therefore, it is important to hit the cache memories for efficient execution. We previously proposed Global Load Instruction Aggregation (GLIA), which improves cache hit rate by reordering load instructions in the way that ones accessing to the same arrays or records were aggregated. The technique was effective for small arrays, but had a disadvantage for big arrays even if they were aggregated. We propose a new
load instruction aggregation technique considering dimensions of arrays. In the new technique, load instructions which have more common higher dimensions are aggregated prior to other ones accessing to the same arrays. We show that the aggregation manner achieves more improvement of cache hit rate independently of the size of arrays included in programs.
Keyword (in Japanese) (See Japanese page) 
(in English) compiler / code optimization / code motion / cache memory / / / /  
Reference Info. IEICE Tech. Rep., vol. 112, no. 164, SS2012-29, pp. 115-119, July 2012.
Paper # SS2012-29 
Date of Issue 2012-07-20 (SS, KBSE) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF SS2012-29 KBSE2012-31

Conference Information
Committee KBSE SS  
Conference Date 2012-07-27 - 2012-07-28 
Place (in Japanese) (See Japanese page) 
Place (in English) Future University Hakodate 
Topics (in Japanese) (See Japanese page) 
Topics (in English) General session 
Paper Information
Registration To SS 
Conference Code 2012-07-KBSE-SS 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Global Load Instruction Aggregation Considering Dimensions of Arrays 
Sub Title (in English)  
Keyword(1) compiler  
Keyword(2) code optimization  
Keyword(3) code motion  
Keyword(4) cache memory  
Keyword(5)  
Keyword(6)  
Keyword(7)  
Keyword(8)  
1st Author's Name Yasunobu Sumikawa  
1st Author's Affiliation Tokyo University of Science (TUS)
2nd Author's Name Munehiro Takimoto  
2nd Author's Affiliation Tokyo University of Science (TUS)
3rd Author's Name  
3rd Author's Affiliation ()
4th Author's Name  
4th Author's Affiliation ()
5th Author's Name  
5th Author's Affiliation ()
6th Author's Name  
6th Author's Affiliation ()
7th Author's Name  
7th Author's Affiliation ()
8th Author's Name  
8th Author's Affiliation ()
9th Author's Name  
9th Author's Affiliation ()
10th Author's Name  
10th Author's Affiliation ()
11th Author's Name  
11th Author's Affiliation ()
12th Author's Name  
12th Author's Affiliation ()
13th Author's Name  
13th Author's Affiliation ()
14th Author's Name  
14th Author's Affiliation ()
15th Author's Name  
15th Author's Affiliation ()
16th Author's Name  
16th Author's Affiliation ()
17th Author's Name  
17th Author's Affiliation ()
18th Author's Name  
18th Author's Affiliation ()
19th Author's Name  
19th Author's Affiliation ()
20th Author's Name  
20th Author's Affiliation ()
Speaker Author-1 
Date Time 2012-07-28 14:20:00 
Presentation Time 30 minutes 
Registration for SS 
Paper # SS2012-29, KBSE2012-31 
Volume (vol) vol.112 
Number (no) no.164(SS), no.165(KBSE) 
Page pp.115-119 
#Pages
Date of Issue 2012-07-20 (SS, KBSE) 


[Return to Top Page]

[Return to IEICE Web Page]


The Institute of Electronics, Information and Communication Engineers (IEICE), Japan