Paper Abstract and Keywords |
Presentation |
2012-11-28 13:50
Performance evaluation of a TCP/IP Hardware Stack Directly Connectable to WEB Application Circuit Kotoko Fujita, Hakaru Tamukoh, Masatoshi Sekine (TUAT) VLD2012-95 DC2012-61 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
We have proposed a TCP/IP circuit and implemented it using a CardBus FPGA board. This paper proposes a TCP/IP hardware stack to allow direct connection of embedded application into the internet. It achieved maximum throughput of 95 Mbps with 100BASE TX LAN PHY chip and cosumed 33.06 mW dynamic power. We also develop a web streaming system by integrating the proposed TCP/IP and a video codec application circuit. The system achieved 21.2 frames per second of full color VGA streaming and consumed 95.7 mW when operating at 66 MHz and 3.3 V. |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
FPGA / TCP/IP / TOE / WEB Application / / / / |
Reference Info. |
IEICE Tech. Rep., vol. 112, no. 320, VLD2012-95, pp. 207-212, Nov. 2012. |
Paper # |
VLD2012-95 |
Date of Issue |
2012-11-19 (VLD, DC) |
ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
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VLD2012-95 DC2012-61 |
Conference Information |
Committee |
VLD DC IPSJ-SLDM CPSY RECONF ICD CPM |
Conference Date |
2012-11-26 - 2012-11-28 |
Place (in Japanese) |
(See Japanese page) |
Place (in English) |
Centennial Hall Kyushu University School of Medicine |
Topics (in Japanese) |
(See Japanese page) |
Topics (in English) |
Design Gaia 2012 -New Field of VLSI Design- |
Paper Information |
Registration To |
VLD |
Conference Code |
2012-11-VLD-DC-SLDM-CPSY-RECONF-ICD-CPM |
Language |
Japanese |
Title (in Japanese) |
(See Japanese page) |
Sub Title (in Japanese) |
(See Japanese page) |
Title (in English) |
Performance evaluation of a TCP/IP Hardware Stack Directly Connectable to WEB Application Circuit |
Sub Title (in English) |
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Keyword(1) |
FPGA |
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TCP/IP |
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TOE |
Keyword(4) |
WEB Application |
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1st Author's Name |
Kotoko Fujita |
1st Author's Affiliation |
Tokyo University of Agriculture and Technology (TUAT) |
2nd Author's Name |
Hakaru Tamukoh |
2nd Author's Affiliation |
Tokyo University of Agriculture and Technology (TUAT) |
3rd Author's Name |
Masatoshi Sekine |
3rd Author's Affiliation |
Tokyo University of Agriculture and Technology (TUAT) |
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Speaker |
Author-1 |
Date Time |
2012-11-28 13:50:00 |
Presentation Time |
25 minutes |
Registration for |
VLD |
Paper # |
VLD2012-95, DC2012-61 |
Volume (vol) |
vol.112 |
Number (no) |
no.320(VLD), no.321(DC) |
Page |
pp.207-212 |
#Pages |
6 |
Date of Issue |
2012-11-19 (VLD, DC) |
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