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| Presentation | 2012-11-28 09:00 A Basic Study of FPGA Routing Architecture Based on Scale Free Network Satoshi Hayama, Motoki Amagasaki, Masahiro Iida, Morihiro Kuga, Toshinori Sueyoshi (Kumamoto Univ.)  RECONF2012-50 |
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| Abstract | (in Japanese) | (See Japanese page) |
| (in English) | FPGA(Fiele Programmable Gate Array) has many routing resources in order to provide the flexibility. These routing resources have a big impact to the peformance of FPGA. Nowadays, the problem of routing congestion has become severe because of increasing of circuit size. The routing congestion causes competitive of signals and routing detours which degrade the peformance of FPGA. In this paper, we examined the cause of routing congestion based on scale free network. We also proposed an architecture which has other networks for high fanout nets. As a pre-analysis, we eliminated high fanout nets from original netlists. We show that the total routing wire length decrease 33.8\% on averege and the minimum channel width decrease 23.6\% on average. |
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| Keyword | (in Japanese) | (See Japanese page) |
| (in English) | FPGA / routing architecture / scale-free network / power law / routing congestion / / / | |
| Reference Info. | IEICE Tech. Rep., vol. 112, no. 325, RECONF2012-50, pp. 17-22, Nov. 2012. | |
| Paper # | RECONF2012-50 | |
| Date of Issue | 2012-11-20 (RECONF) | |
| ISSN | Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 | |
| Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) | |
| Download PDF | RECONF2012-50 |
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| Conference Information | |
| Committee | VLD DC IPSJ-SLDM CPSY RECONF ICD CPM |
| Conference Date | 2012-11-26 - 2012-11-28 |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Centennial Hall Kyushu University School of Medicine |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | Design Gaia 2012 -New Field of VLSI Design- |
| Paper Information | |
| Registration To | RECONF |
| Conference Code | 2012-11-VLD-DC-SLDM-CPSY-RECONF-ICD-CPM |
| Language | Japanese |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A Basic Study of FPGA Routing Architecture Based on Scale Free Network |
| Sub Title (in English) | |
| Keyword(1) | FPGA |
| Keyword(2) | routing architecture |
| Keyword(3) | scale-free network |
| Keyword(4) | power law |
| Keyword(5) | routing congestion |
| Keyword(6) | |
| Keyword(7) | |
| Keyword(8) | |
| 1st Author's Name | Satoshi Hayama |
| 1st Author's Affiliation | Kumamoto University (Kumamoto Univ.) |
| 2nd Author's Name | Motoki Amagasaki |
| 2nd Author's Affiliation | Kumamoto University (Kumamoto Univ.) |
| 3rd Author's Name | Masahiro Iida |
| 3rd Author's Affiliation | Kumamoto University (Kumamoto Univ.) |
| 4th Author's Name | Morihiro Kuga |
| 4th Author's Affiliation | Kumamoto University (Kumamoto Univ.) |
| 5th Author's Name | Toshinori Sueyoshi |
| 5th Author's Affiliation | Kumamoto University (Kumamoto Univ.) |
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| Speaker | Author-1 |
| Date Time | 2012-11-28 09:00:00 |
| Presentation Time | 25 minutes |
| Registration for | RECONF |
| Paper # | RECONF2012-50 |
| Volume (vol) | vol.112 |
| Number (no) | no.325 |
| Page | pp.17-22 |
| #Pages | 6 |
| Date of Issue | 2012-11-20 (RECONF) |
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