Paper Abstract and Keywords |
Presentation |
2013-07-05 14:25
A 1.0-V 12-bit Digitally Calibrated SAR ADC Using Hybrid DAC Technique Masanori Furuta, Hirotomo Ishii, Tomohiko Sugimoto, Toru Okawa, Masazumi Shiochi, Tetsuro Itakura (Toshiba) ICD2013-39 Link to ES Tech. Rep. Archives: ICD2013-39 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
A 1.0-V, 12-bit, 80-MS/s two time-interleaved successive
approximation register (SAR) ADC with 1.2-V differential
full-scale voltage is presented. To minimize the circuit area, a
hybrid DAC which consists of the capacitor and the resistor
DACs is proposed, where the resistor DAC has little impact on
the area, 6%. On-chip logic calibrates errors of the DAC in the
individual channels and the channel-to-channel gain error and
offset. The ADC achieves 61.8 dB peak SNDR and 78.8 dB peak
SFDR at 80-MS/s and consumes 10.7 mW (6.8 mW, excluding
a reference voltage generator). Over 60 dB SNDR is achieved
among all measured chips. |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
SAR ADC / switching energy / digital calibration / / / / / |
Reference Info. |
IEICE Tech. Rep., vol. 113, no. 112, ICD2013-39, pp. 93-96, July 2013. |
Paper # |
ICD2013-39 |
Date of Issue |
2013-06-27 (ICD) |
ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
Download PDF |
ICD2013-39 Link to ES Tech. Rep. Archives: ICD2013-39 |
Conference Information |
Committee |
ICD ITE-IST |
Conference Date |
2013-07-04 - 2013-07-05 |
Place (in Japanese) |
(See Japanese page) |
Place (in English) |
San Refre Hakodate |
Topics (in Japanese) |
(See Japanese page) |
Topics (in English) |
Analog, Mixed Analog and Digital, RF, and Sensor Interface Circuitry |
Paper Information |
Registration To |
ICD |
Conference Code |
2013-07-ICD-IST |
Language |
English |
Title (in Japanese) |
(See Japanese page) |
Sub Title (in Japanese) |
(See Japanese page) |
Title (in English) |
A 1.0-V 12-bit Digitally Calibrated SAR ADC Using Hybrid DAC Technique |
Sub Title (in English) |
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Keyword(1) |
SAR ADC |
Keyword(2) |
switching energy |
Keyword(3) |
digital calibration |
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1st Author's Name |
Masanori Furuta |
1st Author's Affiliation |
Toshiba Corporation (Toshiba) |
2nd Author's Name |
Hirotomo Ishii |
2nd Author's Affiliation |
Toshiba Corporation (Toshiba) |
3rd Author's Name |
Tomohiko Sugimoto |
3rd Author's Affiliation |
Toshiba Corporation (Toshiba) |
4th Author's Name |
Toru Okawa |
4th Author's Affiliation |
Toshiba Corporation (Toshiba) |
5th Author's Name |
Masazumi Shiochi |
5th Author's Affiliation |
Toshiba Corporation (Toshiba) |
6th Author's Name |
Tetsuro Itakura |
6th Author's Affiliation |
Toshiba Corporation (Toshiba) |
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Speaker |
Author-1 |
Date Time |
2013-07-05 14:25:00 |
Presentation Time |
25 minutes |
Registration for |
ICD |
Paper # |
ICD2013-39 |
Volume (vol) |
vol.113 |
Number (no) |
no.112 |
Page |
pp.93-96 |
#Pages |
4 |
Date of Issue |
2013-06-27 (ICD) |
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