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Paper Abstract and Keywords
Presentation 2013-11-27 13:25
An Update Method for a CAM Emulator using a LUT Cascade Based on an EVBDD
Kensuke Kushiyama, Hiroki Nakahara (Kagoshima Univ.), Tsutomu Sasao (Meiji Univ.), Munehiro Matsuura (Kyushu Inst. of Tech.) RECONF2013-40
Abstract (in Japanese) (See Japanese page) 
(in English) The core routers forward packets by IP-lookup using longest prefix matching~(LPM) by using a content addressable memory~(CAM).
With the rapid growth of the Internet, LPM has become the bottleneck in network traffic management.
We have proposed an area-efficiency and high-performance
CAM emulator using a LUT cascade based on an edge-valued multi-valued decision diagram~(EVMDD~(k)).
As for the internet, the registered vector is frequency updated.
This paper proposes an algorithm for the update of the LUT cascade.
We implemented the proposed algorithm on the ARM processor,
and its update time is shorter than peak update time on the BGP protocol.
Experimental shows that, as for the normalized area and lookup speed,
our architecture outperforms existing CAM realizations on the FPGA.
Keyword (in Japanese) (See Japanese page) 
(in English) FPGA / LUT Cascade / Packet Classifier / Router / / / /  
Reference Info. IEICE Tech. Rep., vol. 113, no. 325, RECONF2013-40, pp. 7-12, Nov. 2013.
Paper # RECONF2013-40 
Date of Issue 2013-11-20 (RECONF) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
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Conference Information
Committee VLD DC IPSJ-SLDM CPSY RECONF ICD CPM  
Conference Date 2013-11-27 - 2013-11-29 
Place (in Japanese) (See Japanese page) 
Place (in English)  
Topics (in Japanese) (See Japanese page) 
Topics (in English) Design Gaia 2013 -New Field of VLSI Design- 
Paper Information
Registration To RECONF 
Conference Code 2013-11-VLD-DC-SLDM-CPSY-RECONF-ICD-CPM 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) An Update Method for a CAM Emulator using a LUT Cascade Based on an EVBDD 
Sub Title (in English)  
Keyword(1) FPGA  
Keyword(2) LUT Cascade  
Keyword(3) Packet Classifier  
Keyword(4) Router  
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Keyword(6)  
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Keyword(8)  
1st Author's Name Kensuke Kushiyama  
1st Author's Affiliation Kagoshima University (Kagoshima Univ.)
2nd Author's Name Hiroki Nakahara  
2nd Author's Affiliation Kagoshima University (Kagoshima Univ.)
3rd Author's Name Tsutomu Sasao  
3rd Author's Affiliation Meiji University (Meiji Univ.)
4th Author's Name Munehiro Matsuura  
4th Author's Affiliation Kyushu Institute of Technology (Kyushu Inst. of Tech.)
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Speaker Author-1 
Date Time 2013-11-27 13:25:00 
Presentation Time 25 minutes 
Registration for RECONF 
Paper # RECONF2013-40 
Volume (vol) vol.113 
Number (no) no.325 
Page pp.7-12 
#Pages
Date of Issue 2013-11-20 (RECONF) 


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