Paper Abstract and Keywords |
Presentation |
2014-04-18 09:30
A 0.38-V Operating STT-MRAM with Process Variation Tolerant Sense Amplifier Yohei Umeki, Koji Yanagida, Shusuke Yoshimoto, Shintaro Izumi, Masahiko Yoshimoto, Hiroshi Kawaguchi (Kobe Univ.), Koji Tsunoda, Toshihiro Sugii (LEAP) ICD2014-10 Link to ES Tech. Rep. Archives: ICD2014-10 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
This paper exhibits a 65-nm 8-Mb spin transfer torque magnetoresistance random access memory (STT-MRAM) operating at a single supply voltage with a process-variation tolerant sense amplifier.
The proposed sense amplifier comprises a boosted-gate nMOS and negative-resistance pMOSes as loads, which maximizes the readout margin in any process corner.
The STT-MRAM achieves a cycle time of 1.9 μs (= 0.526 MHz) at 0.38V. The operating power is 6.15 μW at that voltage.
The minimum energy per access is 3.89 pJ/bit when the supply voltage is 0.44 V.
The proposed STT-MRAM operates at lower energy than SRAM when a utilization of a memory bandwidth is 14% or less. |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
STT-MRAM / Low voltage / Process variation tolerant / / / / / |
Reference Info. |
IEICE Tech. Rep., vol. 114, no. 13, ICD2014-10, pp. 47-51, April 2014. |
Paper # |
ICD2014-10 |
Date of Issue |
2014-04-10 (ICD) |
ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
Copyright and reproduction |
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ICD2014-10 Link to ES Tech. Rep. Archives: ICD2014-10 |