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Paper Abstract and Keywords
Presentation 2014-04-18 09:30
A 0.38-V Operating STT-MRAM with Process Variation Tolerant Sense Amplifier
Yohei Umeki, Koji Yanagida, Shusuke Yoshimoto, Shintaro Izumi, Masahiko Yoshimoto, Hiroshi Kawaguchi (Kobe Univ.), Koji Tsunoda, Toshihiro Sugii (LEAP) ICD2014-10 Link to ES Tech. Rep. Archives: ICD2014-10
Abstract (in Japanese) (See Japanese page) 
(in English) This paper exhibits a 65-nm 8-Mb spin transfer torque magnetoresistance random access memory (STT-MRAM) operating at a single supply voltage with a process-variation tolerant sense amplifier.
The proposed sense amplifier comprises a boosted-gate nMOS and negative-resistance pMOSes as loads, which maximizes the readout margin in any process corner.
The STT-MRAM achieves a cycle time of 1.9 μs (= 0.526 MHz) at 0.38V. The operating power is 6.15 μW at that voltage.
The minimum energy per access is 3.89 pJ/bit when the supply voltage is 0.44 V.
The proposed STT-MRAM operates at lower energy than SRAM when a utilization of a memory bandwidth is 14% or less.
Keyword (in Japanese) (See Japanese page) 
(in English) STT-MRAM / Low voltage / Process variation tolerant / / / / /  
Reference Info. IEICE Tech. Rep., vol. 114, no. 13, ICD2014-10, pp. 47-51, April 2014.
Paper # ICD2014-10 
Date of Issue 2014-04-10 (ICD) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
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All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF ICD2014-10 Link to ES Tech. Rep. Archives: ICD2014-10

Conference Information
Committee ICD  
Conference Date 2014-04-17 - 2014-04-18 
Place (in Japanese) (See Japanese page) 
Place (in English) Kikai-Shinko-Kaikan Bldg. 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Memory Device Technologies 
Paper Information
Registration To ICD 
Conference Code 2014-04-ICD 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) A 0.38-V Operating STT-MRAM with Process Variation Tolerant Sense Amplifier 
Sub Title (in English)  
Keyword(1) STT-MRAM  
Keyword(2) Low voltage  
Keyword(3) Process variation tolerant  
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1st Author's Name Yohei Umeki  
1st Author's Affiliation Kobe University (Kobe Univ.)
2nd Author's Name Koji Yanagida  
2nd Author's Affiliation Kobe University (Kobe Univ.)
3rd Author's Name Shusuke Yoshimoto  
3rd Author's Affiliation Kobe University (Kobe Univ.)
4th Author's Name Shintaro Izumi  
4th Author's Affiliation Kobe University (Kobe Univ.)
5th Author's Name Masahiko Yoshimoto  
5th Author's Affiliation Kobe University (Kobe Univ.)
6th Author's Name Hiroshi Kawaguchi  
6th Author's Affiliation Kobe University (Kobe Univ.)
7th Author's Name Koji Tsunoda  
7th Author's Affiliation Low-Power Electronics Association and Project (LEAP)
8th Author's Name Toshihiro Sugii  
8th Author's Affiliation Low-Power Electronics Association and Project (LEAP)
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Date Time 2014-04-18 09:30:00 
Presentation Time 25 minutes 
Registration for ICD 
Paper # ICD2014-10 
Volume (vol) vol.114 
Number (no) no.13 
Page pp.47-51 
#Pages
Date of Issue 2014-04-10 (ICD) 


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