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| Presentation | 2014-09-18 15:45 Challenge for Ultrafast 10K-Node NoC emulation on FPGA Thiem Van Chu, Shimpei Sato, Kenji Kise (Tokyo Inst. of Tech.)  RECONF2014-21 |
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| Abstract | (in Japanese) | (See Japanese page) |
| (in English) | With thousands of cores in the near future NoC architectures, the simulation time is a serious problem that makes architectural design explorations and performance evaluations become infeasible in many cases. This paper proposes an FPGA-based NoC emulator which can achieve an ultrafast simulation speed without compromising the simulation accuracy. Our NoC emulator is the first FPGA-based one which is able to accurately emulate 10K-Node scale NoCs. Instead of directly implementing NoC designs on an FPGA, we emulate the behavior of the entire network using a small number of physical nodes. Moreover, we propose a method to implement the infinite source queues which are required to store injection packets until they can be accepted by the network. We show that an implementation of our NoC emulator on a Virtex 7 FPGA can achieve 438x simulation speedup over a software-based simulator while maintaining the simulation accuracy. | |
| Keyword | (in Japanese) | (See Japanese page) |
| (in English) | FPGA / NoC / Many-core Architecture / Cycle-Accurate Simulation / / / / | |
| Reference Info. | IEICE Tech. Rep., vol. 114, no. 223, RECONF2014-21, pp. 23-28, Sept. 2014. | |
| Paper # | RECONF2014-21 | |
| Date of Issue | 2014-09-11 (RECONF) | |
| ISSN | Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 | |
| Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) | |
| Download PDF | RECONF2014-21 |
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| Conference Information | |
| Committee | RECONF |
| Conference Date | 2014-09-18 - 2014-09-19 |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | Reconfigurable Systems, etc. |
| Paper Information | |
| Registration To | RECONF |
| Conference Code | 2014-09-RECONF |
| Language | English |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Challenge for Ultrafast 10K-Node NoC emulation on FPGA |
| Sub Title (in English) | |
| Keyword(1) | FPGA |
| Keyword(2) | NoC |
| Keyword(3) | Many-core Architecture |
| Keyword(4) | Cycle-Accurate Simulation |
| Keyword(5) | |
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| Keyword(8) | |
| 1st Author's Name | Thiem Van Chu |
| 1st Author's Affiliation | Tokyo Institute of Technology (Tokyo Inst. of Tech.) |
| 2nd Author's Name | Shimpei Sato |
| 2nd Author's Affiliation | Tokyo Institute of Technology (Tokyo Inst. of Tech.) |
| 3rd Author's Name | Kenji Kise |
| 3rd Author's Affiliation | Tokyo Institute of Technology (Tokyo Inst. of Tech.) |
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| Speaker | Author-1 |
| Date Time | 2014-09-18 15:45:00 |
| Presentation Time | 25 minutes |
| Registration for | RECONF |
| Paper # | RECONF2014-21 |
| Volume (vol) | vol.114 |
| Number (no) | no.223 |
| Page | pp.23-28 |
| #Pages | 6 |
| Date of Issue | 2014-09-11 (RECONF) |
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