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Paper Abstract and Keywords
Presentation 2015-12-03 17:00
Processing Time Reduction of Iterative Shrinkage Smoothing Using Parallel Processing
Seijiro Imai, Dabwitso Kasauka, Takashi Imagawa, Hiroshi Tsutsui (Hokkaido Univ.), Hiroyuki Okuhata (Synthesis Co.), Yoshikazu Miyanaga (Hokkaido Univ.) SIS2015-39
Abstract (in Japanese) (See Japanese page) 
(in English) Iterative shrinkage smoothing algorithm can perform image smoothing with
eliminating fine details and preserving principal edges in an image.
However, real time processing is difficult due to large processing time when
input image size is large. By utilizing downscaled image of an input image,
the processing time can be dramatically reduced. In this case, however, the
information of preserved principal edges is not accurate. Considering the
applications utilizing such edge preserving smoothing algorithms, such as
image illumination compensation and detail enhancement, inaccurate principal
edge information degrades the quality of resulted images. In this paper, we
propose processing time reduction method of iterative shrinkage smoothing by
utilizing parallel processing. Experimental results show that the frame rate
increases as number of processes is increased.
Keyword (in Japanese) (See Japanese page) 
(in English) Iterative shrinkage smoothing / Parallel processing / / / / / /  
Reference Info. IEICE Tech. Rep., vol. 115, no. 348, SIS2015-39, pp. 57-60, Dec. 2015.
Paper # SIS2015-39 
Date of Issue 2015-11-26 (SIS) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
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All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
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Conference Information
Committee SIS  
Conference Date 2015-12-03 - 2015-12-04 
Place (in Japanese) (See Japanese page) 
Place (in English) Matsuya-sensen (Awara city, Fukui) 
Topics (in Japanese) (See Japanese page) 
Topics (in English) SoC, Related to RFID, etc. 
Paper Information
Registration To SIS 
Conference Code 2015-12-SIS 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Processing Time Reduction of Iterative Shrinkage Smoothing Using Parallel Processing 
Sub Title (in English)  
Keyword(1) Iterative shrinkage smoothing  
Keyword(2) Parallel processing  
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1st Author's Name Seijiro Imai  
1st Author's Affiliation Hokkaido University (Hokkaido Univ.)
2nd Author's Name Dabwitso Kasauka  
2nd Author's Affiliation Hokkaido University (Hokkaido Univ.)
3rd Author's Name Takashi Imagawa  
3rd Author's Affiliation Hokkaido University (Hokkaido Univ.)
4th Author's Name Hiroshi Tsutsui  
4th Author's Affiliation Hokkaido University (Hokkaido Univ.)
5th Author's Name Hiroyuki Okuhata  
5th Author's Affiliation Synthesis Corporation (Synthesis Co.)
6th Author's Name Yoshikazu Miyanaga  
6th Author's Affiliation Hokkaido University (Hokkaido Univ.)
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Date Time 2015-12-03 17:00:00 
Presentation Time 20 minutes 
Registration for SIS 
Paper # SIS2015-39 
Volume (vol) vol.115 
Number (no) no.348 
Page pp.57-60 
#Pages
Date of Issue 2015-11-26 (SIS) 


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