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Paper Abstract and Keywords
Presentation 2016-03-25 15:45
A consideration on variation correction for fail prediction in LSI test
Ryo Ogawa (NAIST), Yoshiyuki Nakamura (Renesas Semiconductor Package & Test Solutions), Michiko Inoue (NAIST) CPSY2015-158 DC2015-112
Abstract (in Japanese) (See Japanese page) 
(in English) Recently, a test cost reduction using data mining has been attracted. It is expected to reduce the cost by predicting failing LSIs in later test processes using result of earlier test processes. However measured values in test processes have variation caused by the manufacturing and measurements themselves. Therefore, it is difficult to predict tests results without correction. In this paper, we propose variation correction method that corrects variations among package-lots, testers, and tester-sites respectively. We also propose a method to evaluate the effectiveness of correction and show that the proposed correction method is effective. Finally, we will consider how the proposed correction method is effective to fail prediction during LSI testing.
Keyword (in Japanese) (See Japanese page) 
(in English) data mining / burn-in test / LSI test / variation correction / outlier analysis / / /  
Reference Info. IEICE Tech. Rep., vol. 115, no. 519, DC2015-112, pp. 271-276, March 2016.
Paper # DC2015-112 
Date of Issue 2016-03-17 (CPSY, DC) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Notes on Review This article is a technical report without peer review, and its polished version will be published elsewhere.
Download PDF CPSY2015-158 DC2015-112

Conference Information
Committee CPSY DC IPSJ-SLDM IPSJ-EMB IPSJ-ARC  
Conference Date 2016-03-24 - 2016-03-25 
Place (in Japanese) (See Japanese page) 
Place (in English) Fukue Bunka Hall/Rodou Fukushi Center 
Topics (in Japanese) (See Japanese page) 
Topics (in English) ETNET2016 
Paper Information
Registration To DC 
Conference Code 2016-03-CPSY-DC-SLDM-EMB-ARC 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) A consideration on variation correction for fail prediction in LSI test 
Sub Title (in English)  
Keyword(1) data mining  
Keyword(2) burn-in test  
Keyword(3) LSI test  
Keyword(4) variation correction  
Keyword(5) outlier analysis  
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1st Author's Name Ryo Ogawa  
1st Author's Affiliation Nara Institute of Science and Technology (NAIST)
2nd Author's Name Yoshiyuki Nakamura  
2nd Author's Affiliation Renesas Semiconductor Package & Test Solutions (Renesas Semiconductor Package & Test Solutions)
3rd Author's Name Michiko Inoue  
3rd Author's Affiliation Nara Institute of Science and Technology (NAIST)
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Speaker Author-1 
Date Time 2016-03-25 15:45:00 
Presentation Time 25 minutes 
Registration for DC 
Paper # CPSY2015-158, DC2015-112 
Volume (vol) vol.115 
Number (no) no.518(CPSY), no.519(DC) 
Page pp.271-276 
#Pages
Date of Issue 2016-03-17 (CPSY, DC) 


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