Paper Abstract and Keywords |
Presentation |
2016-05-19 14:45
Simulation of error-correcting code using LDPC code with Sum-Product method for a single-dot pattern method Kitahiro Kaneda (Osaka Prefecture Univ.), Yasuyuki Anezaki, Keiichi Iwamura (TUS), Isao Echizen (NII) IT2016-7 EMM2016-7 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
We have proposed a single dot information hiding method for printed matter. In this paper, we try to apply LDPC error correction code into a single dot information hiding method for improving its accuracy. As a result we show no error with 38880bit information capacity at printed character density 17% A4 document. |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
Single Dot Information Hiding Method / LDPC Error Correction Code / Sum-Product Decode / / / / / |
Reference Info. |
IEICE Tech. Rep., vol. 116, no. 34, EMM2016-7, pp. 37-42, May 2016. |
Paper # |
EMM2016-7 |
Date of Issue |
2016-05-12 (IT, EMM) |
ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
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IT2016-7 EMM2016-7 |
Conference Information |
Committee |
IT EMM |
Conference Date |
2016-05-19 - 2016-05-20 |
Place (in Japanese) |
(See Japanese page) |
Place (in English) |
Otaru Economic Center |
Topics (in Japanese) |
(See Japanese page) |
Topics (in English) |
Information Security, Information Theory, Information Hiding, etc. |
Paper Information |
Registration To |
EMM |
Conference Code |
2016-05-IT-EMM |
Language |
Japanese |
Title (in Japanese) |
(See Japanese page) |
Sub Title (in Japanese) |
(See Japanese page) |
Title (in English) |
Simulation of error-correcting code using LDPC code with Sum-Product method for a single-dot pattern method |
Sub Title (in English) |
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Keyword(1) |
Single Dot Information Hiding Method |
Keyword(2) |
LDPC Error Correction Code |
Keyword(3) |
Sum-Product Decode |
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1st Author's Name |
Kitahiro Kaneda |
1st Author's Affiliation |
Osaka Prefecture University (Osaka Prefecture Univ.) |
2nd Author's Name |
Yasuyuki Anezaki |
2nd Author's Affiliation |
Tokyo University of Science (TUS) |
3rd Author's Name |
Keiichi Iwamura |
3rd Author's Affiliation |
Tokyo University of Science (TUS) |
4th Author's Name |
Isao Echizen |
4th Author's Affiliation |
National Institute of Informatics (NII) |
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Speaker |
Author-1 |
Date Time |
2016-05-19 14:45:00 |
Presentation Time |
25 minutes |
Registration for |
EMM |
Paper # |
IT2016-7, EMM2016-7 |
Volume (vol) |
vol.116 |
Number (no) |
no.33(IT), no.34(EMM) |
Page |
pp.37-42 |
#Pages |
6 |
Date of Issue |
2016-05-12 (IT, EMM) |
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