Paper Abstract and Keywords |
Presentation |
2016-06-17 09:30
Line selection to reduce store-energy in MTJ-based non-volatile caches Takamasa Fukasawa, Kimiyoshi Usami (SIT) CAS2016-18 VLD2016-24 SIP2016-52 MSS2016-18 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
There is a technique of power gating for reducing the energy consumption of the cache. The technique is a combination of power gating to reduce the leakage power and Non-volatile element(MTJ). However, there is a problem that energy consumption increases by writing on MTJ in entire cache lines. Therefore, we propose a method to select lines to store data in MTJ in descending order of the number of accesses. We show that energy is reduced by performing the proposed method. |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
Power Gating / MTJ / cache / / / / / |
Reference Info. |
IEICE Tech. Rep., vol. 116, no. 94, VLD2016-24, pp. 97-102, June 2016. |
Paper # |
VLD2016-24 |
Date of Issue |
2016-06-09 (CAS, VLD, SIP, MSS) |
ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
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CAS2016-18 VLD2016-24 SIP2016-52 MSS2016-18 |
Conference Information |
Committee |
VLD CAS MSS SIP |
Conference Date |
2016-06-16 - 2016-06-17 |
Place (in Japanese) |
(See Japanese page) |
Place (in English) |
Hirosaki Shiritsu Kanko-kan |
Topics (in Japanese) |
(See Japanese page) |
Topics (in English) |
System, signal processing and related topics |
Paper Information |
Registration To |
VLD |
Conference Code |
2016-06-VLD-CAS-MSS-SIP |
Language |
Japanese |
Title (in Japanese) |
(See Japanese page) |
Sub Title (in Japanese) |
(See Japanese page) |
Title (in English) |
Line selection to reduce store-energy in MTJ-based non-volatile caches |
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Power Gating |
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MTJ |
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cache |
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1st Author's Name |
Takamasa Fukasawa |
1st Author's Affiliation |
Shibaura Institute of Technology (SIT) |
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Kimiyoshi Usami |
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Shibaura Institute of Technology (SIT) |
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Speaker |
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Date Time |
2016-06-17 09:30:00 |
Presentation Time |
20 minutes |
Registration for |
VLD |
Paper # |
CAS2016-18, VLD2016-24, SIP2016-52, MSS2016-18 |
Volume (vol) |
vol.116 |
Number (no) |
no.93(CAS), no.94(VLD), no.95(SIP), no.96(MSS) |
Page |
pp.97-102 |
#Pages |
6 |
Date of Issue |
2016-06-09 (CAS, VLD, SIP, MSS) |
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