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| Presentation | 2016-08-10 11:25 All-optical logic circuit using plasmonic multimode interference Masashi Ota, Asahi Sumimura, Ryo Watanabe, Kotaro Nakayama, Takahiro Furuki, Yuya Ishii, Mitsuo Fukuda (Toyohashi Univ. of Tech.)  ED2016-41 Link to ES Tech. Rep. Archives: ED2016-41 |
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| Abstract | (in Japanese) | (See Japanese page) |
| (in English) | Plasmonic logic circuits are of interest because of their potential for high-speed information processing and high-density integration of optical devices. Recently, we have demonstrated an all-optical logic circuits with simple phase adjustment using plasmonic multimode interference (MMI) devices, composed of SiO2 stripes on a Au film. In this study, we cascade plasmonic logic devices composed of a 2×2 MMI device and 1×1 MMI phase adjuster, and demonstrate a half-adder logic operation using scanning near-field optical microscopy. | |
| Keyword | (in Japanese) | (See Japanese page) |
| (in English) | Surface Plasmons / Photonic Integrated Circuit / Optical Logic / Multimode Interference / Plasmonic Device / / / | |
| Reference Info. | IEICE Tech. Rep., vol. 116, no. 181, ED2016-41, pp. 61-64, Aug. 2016. | |
| Paper # | ED2016-41 | |
| Date of Issue | 2016-08-02 (ED) | |
| ISSN | Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 | |
| Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) | |
| Download PDF | ED2016-41 Link to ES Tech. Rep. Archives: ED2016-41 |
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| Conference Information | |
| Committee | ED |
| Conference Date | 2016-08-09 - 2016-08-10 |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Kikai-Shinko-Kaikan Bldg. |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | Sensor, MEMS, general |
| Paper Information | |
| Registration To | ED |
| Conference Code | 2016-08-ED |
| Language | Japanese |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | All-optical logic circuit using plasmonic multimode interference |
| Sub Title (in English) | |
| Keyword(1) | Surface Plasmons |
| Keyword(2) | Photonic Integrated Circuit |
| Keyword(3) | Optical Logic |
| Keyword(4) | Multimode Interference |
| Keyword(5) | Plasmonic Device |
| Keyword(6) | |
| Keyword(7) | |
| Keyword(8) | |
| 1st Author's Name | Masashi Ota |
| 1st Author's Affiliation | Toyohashi University of Technology (Toyohashi Univ. of Tech.) |
| 2nd Author's Name | Asahi Sumimura |
| 2nd Author's Affiliation | Toyohashi University of Technology (Toyohashi Univ. of Tech.) |
| 3rd Author's Name | Ryo Watanabe |
| 3rd Author's Affiliation | Toyohashi University of Technology (Toyohashi Univ. of Tech.) |
| 4th Author's Name | Kotaro Nakayama |
| 4th Author's Affiliation | Toyohashi University of Technology (Toyohashi Univ. of Tech.) |
| 5th Author's Name | Takahiro Furuki |
| 5th Author's Affiliation | Toyohashi University of Technology (Toyohashi Univ. of Tech.) |
| 6th Author's Name | Yuya Ishii |
| 6th Author's Affiliation | Toyohashi University of Technology (Toyohashi Univ. of Tech.) |
| 7th Author's Name | Mitsuo Fukuda |
| 7th Author's Affiliation | Toyohashi University of Technology (Toyohashi Univ. of Tech.) |
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| Speaker | Author-1 |
| Date Time | 2016-08-10 11:25:00 |
| Presentation Time | 25 minutes |
| Registration for | ED |
| Paper # | ED2016-41 |
| Volume (vol) | vol.116 |
| Number (no) | no.181 |
| Page | pp.61-64 |
| #Pages | 4 |
| Date of Issue | 2016-08-02 (ED) |
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