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Paper Abstract and Keywords
Presentation 2017-01-30 10:00
[Invited Talk] Demonstrating Performance Improvement of Complementary TFET Circuits by ION Enhancement Based on Isoelectronic Trap Technology
Takahiro Mori, Hidehiro Asai, Junichi Hattori, Koichi Fukuda, Shintaro Otsuka, Yukinori Morita, Shin-ichi O'uchi, Hiroshi Fuketa, Shinji Migita, Wataru Mizubayashi, Hiroyuki Ota, Takashi Matuskawa (ANational Institute of Advanced Industrial ScieIST) SDM2016-130 Link to ES Tech. Rep. Archives: SDM2016-130
Abstract (in Japanese) (See Japanese page) 
(in English) We improved the performance of a complementary circuit comprising Si-based tunnel field-effect transistors (TFETs) by using isoelectronic trap (IET) technology. IET technology was found to increase the ON current (ION) 5 times in P-TFETs and 2 times in N-TFETs. The ION enhancement improved the inverter performance. In addition, ring oscillator (RO) circuit operation with the complementary TFET inverters was experimentally demonstrated for the first time. The RO circuit with IET-TFETs exhibited a higher operation frequency than that with conventional TFETs. IET technology provides a breakthrough towards realizing complementary circuits with Si-TFETs.
Keyword (in Japanese) (See Japanese page) 
(in English) Tunnel Field-Effect Transistor / Isoelectronic Trap / Complementary Integrated Circuit / / / / /  
Reference Info. IEICE Tech. Rep., vol. 116, no. 448, SDM2016-130, pp. 1-4, Jan. 2017.
Paper # SDM2016-130 
Date of Issue 2017-01-23 (SDM) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
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All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF SDM2016-130 Link to ES Tech. Rep. Archives: SDM2016-130

Conference Information
Committee SDM  
Conference Date 2017-01-30 - 2017-01-30 
Place (in Japanese) (See Japanese page) 
Place (in English) Kikai-Shinko-Kaikan Bldg. 
Topics (in Japanese) (See Japanese page) 
Topics (in English)  
Paper Information
Registration To SDM 
Conference Code 2017-01-SDM 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Demonstrating Performance Improvement of Complementary TFET Circuits by ION Enhancement Based on Isoelectronic Trap Technology 
Sub Title (in English)  
Keyword(1) Tunnel Field-Effect Transistor  
Keyword(2) Isoelectronic Trap  
Keyword(3) Complementary Integrated Circuit  
Keyword(4)  
Keyword(5)  
Keyword(6)  
Keyword(7)  
Keyword(8)  
1st Author's Name Takahiro Mori  
1st Author's Affiliation National Institute of Advanced Industrial Science and Technology (ANational Institute of Advanced Industrial ScieIST)
2nd Author's Name Hidehiro Asai  
2nd Author's Affiliation National Institute of Advanced Industrial Science and Technology (ANational Institute of Advanced Industrial ScieIST)
3rd Author's Name Junichi Hattori  
3rd Author's Affiliation National Institute of Advanced Industrial Science and Technology (ANational Institute of Advanced Industrial ScieIST)
4th Author's Name Koichi Fukuda  
4th Author's Affiliation National Institute of Advanced Industrial Science and Technology (ANational Institute of Advanced Industrial ScieIST)
5th Author's Name Shintaro Otsuka  
5th Author's Affiliation National Institute of Advanced Industrial Science and Technology (ANational Institute of Advanced Industrial ScieIST)
6th Author's Name Yukinori Morita  
6th Author's Affiliation National Institute of Advanced Industrial Science and Technology (ANational Institute of Advanced Industrial ScieIST)
7th Author's Name Shin-ichi O'uchi  
7th Author's Affiliation National Institute of Advanced Industrial Science and Technology (ANational Institute of Advanced Industrial ScieIST)
8th Author's Name Hiroshi Fuketa  
8th Author's Affiliation National Institute of Advanced Industrial Science and Technology (ANational Institute of Advanced Industrial ScieIST)
9th Author's Name Shinji Migita  
9th Author's Affiliation National Institute of Advanced Industrial Science and Technology (ANational Institute of Advanced Industrial ScieIST)
10th Author's Name Wataru Mizubayashi  
10th Author's Affiliation National Institute of Advanced Industrial Science and Technology (ANational Institute of Advanced Industrial ScieIST)
11th Author's Name Hiroyuki Ota  
11th Author's Affiliation National Institute of Advanced Industrial Science and Technology (ANational Institute of Advanced Industrial ScieIST)
12th Author's Name Takashi Matuskawa  
12th Author's Affiliation National Institute of Advanced Industrial Science and Technology (ANational Institute of Advanced Industrial ScieIST)
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Speaker Author-1 
Date Time 2017-01-30 10:00:00 
Presentation Time 30 minutes 
Registration for SDM 
Paper # SDM2016-130 
Volume (vol) vol.116 
Number (no) no.448 
Page pp.1-4 
#Pages
Date of Issue 2017-01-23 (SDM) 


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