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Paper Abstract and Keywords
Presentation 2017-04-20 13:00
Performance Evaluation of QoS Scheduling Architecture by the Coordination of Hardware and Software
Atsushi Kitada, Kazuto Nishimura, Hiroshi Tomonaga (Fujitsu Lab.) CS2017-1
Abstract (in Japanese) (See Japanese page) 
(in English) Recent improvements of CPU performance and multi-core/multi-thread processing are driving forward the network softwarization. But it’s still difficult to provide network functions with complicated algorithm like QoS scheduling at full wire rate in ultra-high speed interfaces such as 400 Gbit Ethernet by software. So we have proposed the QoS scheduling architecture by the coordination of hardware and software, rather than controlling everything by software. In this paper, we describe the further study for practical use of our architecture and the performance evaluation result by the prototype system, and we prove the effectiveness of our proposed architecture.
Keyword (in Japanese) (See Japanese page) 
(in English) QoS Scheduling / Softwarization / 400Gbit Ethernet / Coordination of Hardware and Software / / / /  
Reference Info. IEICE Tech. Rep., vol. 117, no. 4, CS2017-1, pp. 1-6, April 2017.
Paper # CS2017-1 
Date of Issue 2017-04-13 (CS) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF CS2017-1

Conference Information
Committee CS CQ  
Conference Date 2017-04-20 - 2017-04-21 
Place (in Japanese) (See Japanese page) 
Place (in English) Chitose Institute of Science and Technology 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Network Serice, Service Quality, SDN (Software-Defined Networking), NFV (Network Functions. Virtualization), Network Virtualization, Cloud, Contents Delivery, etc 
Paper Information
Registration To CS 
Conference Code 2017-04-CS-CQ 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Performance Evaluation of QoS Scheduling Architecture by the Coordination of Hardware and Software 
Sub Title (in English)  
Keyword(1) QoS Scheduling  
Keyword(2) Softwarization  
Keyword(3) 400Gbit Ethernet  
Keyword(4) Coordination of Hardware and Software  
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1st Author's Name Atsushi Kitada  
1st Author's Affiliation Fujitsu Laboratories LTD. (Fujitsu Lab.)
2nd Author's Name Kazuto Nishimura  
2nd Author's Affiliation Fujitsu Laboratories LTD. (Fujitsu Lab.)
3rd Author's Name Hiroshi Tomonaga  
3rd Author's Affiliation Fujitsu Laboratories LTD. (Fujitsu Lab.)
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Speaker Author-1 
Date Time 2017-04-20 13:00:00 
Presentation Time 25 minutes 
Registration for CS 
Paper # CS2017-1 
Volume (vol) vol.117 
Number (no) no.4 
Page pp.1-6 
#Pages
Date of Issue 2017-04-13 (CS) 


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