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| Paper Abstract and Keywords | ||
| Presentation | 2018-12-06 11:20 An FPGA-NIC Based 40-Gbit/s Automated Response Circuit for Invalid DNS Packets to Suppress CPU Utilization of DNS Content Server Shoko Ohteru, Saki Hatta, Tomoaki Kawamura (NTT), Koji Yamazaki (NTT-AT), Takahiro Hatano, Akihiko Miyazaki, Koyo Nitta (NTT)  VLD2018-55 DC2018-41 |
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| Abstract | (in Japanese) | (See Japanese page) |
| (in English) | (Not available yet) | |
| Keyword | (in Japanese) | (See Japanese page) |
| (in English) | FPGA / hardware offload / DNS query / domain name / / / / | |
| Reference Info. | IEICE Tech. Rep., vol. 118, no. 334, VLD2018-55, pp. 113-118, Dec. 2018. | |
| Paper # | VLD2018-55 | |
| Date of Issue | 2018-11-28 (VLD, DC) | |
| ISSN | Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 | |
| Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) | |
| Download PDF | VLD2018-55 DC2018-41 |
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| Conference Information | |
| Committee | VLD DC CPSY RECONF CPM ICD IE IPSJ-SLDM |
| Conference Date | 2018-12-05 - 2018-12-07 |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Satellite Campus Hiroshima |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | Design Gaia 2018 -New Field of VLSI Design- |
| Paper Information | |
| Registration To | VLD |
| Conference Code | 2018-12-VLD-DC-CPSY-RECONF-CPM-ICD-IE-SLDM-EMB-ARC |
| Language | Japanese |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | An FPGA-NIC Based 40-Gbit/s Automated Response Circuit for Invalid DNS Packets to Suppress CPU Utilization of DNS Content Server |
| Sub Title (in English) | |
| Keyword(1) | FPGA |
| Keyword(2) | hardware offload |
| Keyword(3) | DNS query |
| Keyword(4) | domain name |
| Keyword(5) | |
| Keyword(6) | |
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| Keyword(8) | |
| 1st Author's Name | Shoko Ohteru |
| 1st Author's Affiliation | NTT Corporation (NTT) |
| 2nd Author's Name | Saki Hatta |
| 2nd Author's Affiliation | NTT Corporation (NTT) |
| 3rd Author's Name | Tomoaki Kawamura |
| 3rd Author's Affiliation | NTT Corporation (NTT) |
| 4th Author's Name | Koji Yamazaki |
| 4th Author's Affiliation | NTT Advanced Technology Corporation (NTT-AT) |
| 5th Author's Name | Takahiro Hatano |
| 5th Author's Affiliation | NTT Corporation (NTT) |
| 6th Author's Name | Akihiko Miyazaki |
| 6th Author's Affiliation | NTT Corporation (NTT) |
| 7th Author's Name | Koyo Nitta |
| 7th Author's Affiliation | NTT Corporation (NTT) |
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| Speaker | Author-1 |
| Date Time | 2018-12-06 11:20:00 |
| Presentation Time | 25 minutes |
| Registration for | VLD |
| Paper # | VLD2018-55, DC2018-41 |
| Volume (vol) | vol.118 |
| Number (no) | no.334(VLD), no.335(DC) |
| Page | pp.113-118 |
| #Pages | 6 |
| Date of Issue | 2018-11-28 (VLD, DC) |
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