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| Presentation | 2019-02-28 15:45 An Algorithm to Determine Circuit Model Parameters for Electric Double-Layer Capacitor Naoki Kosaka, Shuji Tsukiyama (Chuo Univ.), Kenichi Noto, Takuji Okumura (Komatsu Ltd.)  VLD2018-118 HWS2018-81 |
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| Abstract | (in Japanese) | (See Japanese page) |
| (in English) | EDLCs (electric double-layer capacitors) have been used in various applications due to high power density and durability. However, we must connect them in series so as to obtain high voltage. In order to analyze performance and lifetime of such a series connection of EDLCs, we need a simple circuit model which can represent behavior of single EDLC precisely. In this paper, we propose a circuit model with three parallel capacitances, and an algorithm to determine parameters of resistance and capacitance by using currents of constant-voltage charging and voltages of constant-current charging. Then, we evaluate the accuracy by using voltages of natural discharging. | |
| Keyword | (in Japanese) | (See Japanese page) |
| (in English) | electric double-layer capacitor / circuit model / parameter determination / performance evaluation / / / / | |
| Reference Info. | IEICE Tech. Rep., vol. 118, no. 457, VLD2018-118, pp. 151-156, Feb. 2019. | |
| Paper # | VLD2018-118 | |
| Date of Issue | 2019-02-20 (VLD, HWS) | |
| ISSN | Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 | |
| Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) | |
| Download PDF | VLD2018-118 HWS2018-81 |
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| Conference Information | |
| Committee | HWS VLD |
| Conference Date | 2019-02-27 - 2019-03-02 |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Okinawa Ken Seinen Kaikan |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | Design Technology for System-on-Silicon, Hardware Security, etc. |
| Paper Information | |
| Registration To | VLD |
| Conference Code | 2019-02-HWS-VLD |
| Language | Japanese |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | An Algorithm to Determine Circuit Model Parameters for Electric Double-Layer Capacitor |
| Sub Title (in English) | |
| Keyword(1) | electric double-layer capacitor |
| Keyword(2) | circuit model |
| Keyword(3) | parameter determination |
| Keyword(4) | performance evaluation |
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| 1st Author's Name | Naoki Kosaka |
| 1st Author's Affiliation | Chuo University (Chuo Univ.) |
| 2nd Author's Name | Shuji Tsukiyama |
| 2nd Author's Affiliation | Chuo University (Chuo Univ.) |
| 3rd Author's Name | Kenichi Noto |
| 3rd Author's Affiliation | Komatsu Ltd. (Komatsu Ltd.) |
| 4th Author's Name | Takuji Okumura |
| 4th Author's Affiliation | Komatsu Ltd. (Komatsu Ltd.) |
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| Speaker | Author-1 |
| Date Time | 2019-02-28 15:45:00 |
| Presentation Time | 25 minutes |
| Registration for | VLD |
| Paper # | VLD2018-118, HWS2018-81 |
| Volume (vol) | vol.118 |
| Number (no) | no.457(VLD), no.458(HWS) |
| Page | pp.151-156 |
| #Pages | 6 |
| Date of Issue | 2019-02-20 (VLD, HWS) |
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