講演抄録/キーワード |
講演名 |
2019-03-15 10:35
A 0.85mm2 BLE Transceiver with Embedded T/R Switch, 2.6mW Harmonic Suppressed Transmitter and 2.3mW Hybrid-Loop Receiver ○Zheng Sun・Hanli Liu・Dexian Tang・Hongye Huang・Tohru Kaneko・Rui Wu・Wei Deng・Teruki Someya・Atsushi Shirane・Kenichi Okada(Tokyo Tech) MW2018-171 ICD2018-115 エレソ技報アーカイブへのリンク:MW2018-171 ICD2018-115 |
抄録 |
(和) |
(まだ登録されていません) |
(英) |
This paper presents a miniaturized Bluetooth Low-Energy transceiver (TRX) for short-range IoT applications in 65-nm CMOS. A T/R switch embedded with transmitter harmonic-suppression and on-chip impedance matching is proposed. A hybrid-loop TRX structure based on wide-BW fractional-N digital phase-locked loop (DPLL) is implemented to achieve the maximize power reduction. The BLE transceiver delivers $-$6dBm output while consuming 2.6mW. 18.5% TX efficiency is achieved at 0dBm output power. A -94dBm receiver sensitivity is achieved with 2.3mW receiver power consumption while the bypass route integration improves the dynamic-range of the receiver. Thanks to the T/R switch embedded with harmonic suppression, $-$56dBc of 2nd-order harmonic distortion (HD2) and $-$48dBc of 3rd-order harmonic distortion (HD3) suppression are achieved. The fabricated BLE transceiver occupies 0.85mmtextsuperscript{2} on-chip area. This transceiver satisfies the BLE radio specification without the need for external filters, that enables minimum size modules and short time to market. |
キーワード |
(和) |
/ / / / / / / |
(英) |
BLE / transceiver / hybrid-loop / CMOS / T/R switch / on-chip / area / harmonic-suppression |
文献情報 |
信学技報, vol. 118, no. 507, ICD2018-115, pp. 81-85, 2019年3月. |
資料番号 |
ICD2018-115 |
発行日 |
2019-03-07 (MW, ICD) |
ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
著作権に ついて |
技術研究報告に掲載された論文の著作権は電子情報通信学会に帰属します.(許諾番号:10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
PDFダウンロード |
MW2018-171 ICD2018-115 エレソ技報アーカイブへのリンク:MW2018-171 ICD2018-115 |