Paper Abstract and Keywords |
Presentation |
2019-03-18 09:00
A Test Generation Method for Resistive Open Faults Using MAX-SAT Problem Hiroshi Yamazaki, Toshinori Hosokawa (Nihon Univ.), Masayoshi Yoshimura (Kyoto Sangyo Univ.), Masayuki Arai (Nihon Univ.), Hiroyuki Yotsuyanagi, Masaki Hashizume (Tokushima Univ.) CPSY2018-117 DC2018-99 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
In VLSI testing, stuck-at fault model and transition fault model have been widely used. However, with advance of semiconductor technologies, it is increasing in defects whose detection is difficult in testing using conventional fault models. One of such defects is modeled by resistive open fault model. Resistive open faults represent degradation in conductivity within circuit's interconnects and result in small delay faults that causing timing failures. The size of an additional delay at a resistive open fault is determined by the effect of the adjacent lines. Therefore, it is important to consider adjacent lines and fault propagation paths in test generation for resistive open faults. In this paper, we propose a test generation method for resistive open faults which considers the number of reversed phase transitions on adjacent lines and the number of sensitized lines for fault propagation using MAX-SAT. Moreover, we evaluate the properties of generated test patterns. |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
resistive open faults / MAX-SAT / test generation / adjacent lines / / / / |
Reference Info. |
IEICE Tech. Rep., vol. 118, no. 515, DC2018-99, pp. 315-320, March 2019. |
Paper # |
DC2018-99 |
Date of Issue |
2019-03-10 (CPSY, DC) |
ISSN |
Online edition: ISSN 2432-6380 |
Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
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CPSY2018-117 DC2018-99 |
Conference Information |
Committee |
CPSY DC IPSJ-SLDM IPSJ-EMB IPSJ-ARC |
Conference Date |
2019-03-17 - 2019-03-18 |
Place (in Japanese) |
(See Japanese page) |
Place (in English) |
Nishinoomote City Hall (Tanega-shima) |
Topics (in Japanese) |
(See Japanese page) |
Topics (in English) |
ETNET2019 |
Paper Information |
Registration To |
DC |
Conference Code |
2019-03-CPSY-DC-SLDM-EMB-ARC |
Language |
Japanese |
Title (in Japanese) |
(See Japanese page) |
Sub Title (in Japanese) |
(See Japanese page) |
Title (in English) |
A Test Generation Method for Resistive Open Faults Using MAX-SAT Problem |
Sub Title (in English) |
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Keyword(1) |
resistive open faults |
Keyword(2) |
MAX-SAT |
Keyword(3) |
test generation |
Keyword(4) |
adjacent lines |
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1st Author's Name |
Hiroshi Yamazaki |
1st Author's Affiliation |
Nihon University (Nihon Univ.) |
2nd Author's Name |
Toshinori Hosokawa |
2nd Author's Affiliation |
Nihon University (Nihon Univ.) |
3rd Author's Name |
Masayoshi Yoshimura |
3rd Author's Affiliation |
Kyoto Sangyo University (Kyoto Sangyo Univ.) |
4th Author's Name |
Masayuki Arai |
4th Author's Affiliation |
Nihon University (Nihon Univ.) |
5th Author's Name |
Hiroyuki Yotsuyanagi |
5th Author's Affiliation |
Tokushima University (Tokushima Univ.) |
6th Author's Name |
Masaki Hashizume |
6th Author's Affiliation |
Tokushima University (Tokushima Univ.) |
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Speaker |
Author-1 |
Date Time |
2019-03-18 09:00:00 |
Presentation Time |
20 minutes |
Registration for |
DC |
Paper # |
CPSY2018-117, DC2018-99 |
Volume (vol) |
vol.118 |
Number (no) |
no.514(CPSY), no.515(DC) |
Page |
pp.315-320 |
#Pages |
6 |
Date of Issue |
2019-03-10 (CPSY, DC) |
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