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| Presentation | 2020-03-07 13:25 Side-channel leakage evaluation of cryptographic module by IC chip level power supply noise simulation Kazuki Yasuda, Kazuki Monta, Akihiro Tsukioka, Noriyuki Miura, Makoto Nagata (Kobe Univ), Karthik Srinivasan, Shan Wan, Lagn Lin, Ying-Shiun Li, Norman Chang (ANSYS)  VLD2019-142 HWS2019-115 |
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| Abstract | (in Japanese) | (See Japanese page) |
| (in English) | In this research, we focused on power supply noise as one of the observed side channel information leakage in cryptographic modules using semiconductor integrated circuit (Ic chip) technology. The current consumption model by circuit operation and the power supply network model of the circuit are combined, and the result of analysis by the power supply noise simulation at the chip level is reported. | |
| Keyword | (in Japanese) | (See Japanese page) |
| (in English) | IC chip / Power Noise / Crypto Modules / Side-channel leakage / supply noise simulation / / / | |
| Reference Info. | IEICE Tech. Rep., vol. 119, no. 444, HWS2019-115, pp. 279-282, March 2020. | |
| Paper # | HWS2019-115 | |
| Date of Issue | 2020-02-26 (VLD, HWS) | |
| ISSN | Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 | |
| Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) | |
| Download PDF | VLD2019-142 HWS2019-115 |
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| Conference Information | |
| Committee | HWS VLD |
| Conference Date | 2020-03-04 - 2020-03-07 |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Okinawa Ken Seinen Kaikan |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | Design Technology for System-on-Silicon, Hardware Security, etc. |
| Paper Information | |
| Registration To | HWS |
| Conference Code | 2020-03-HWS-VLD |
| Language | Japanese |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Side-channel leakage evaluation of cryptographic module by IC chip level power supply noise simulation |
| Sub Title (in English) | |
| Keyword(1) | IC chip |
| Keyword(2) | Power Noise |
| Keyword(3) | Crypto Modules |
| Keyword(4) | Side-channel leakage |
| Keyword(5) | supply noise simulation |
| Keyword(6) | |
| Keyword(7) | |
| Keyword(8) | |
| 1st Author's Name | Kazuki Yasuda |
| 1st Author's Affiliation | Kobe University (Kobe Univ) |
| 2nd Author's Name | Kazuki Monta |
| 2nd Author's Affiliation | Kobe University (Kobe Univ) |
| 3rd Author's Name | Akihiro Tsukioka |
| 3rd Author's Affiliation | Kobe University (Kobe Univ) |
| 4th Author's Name | Noriyuki Miura |
| 4th Author's Affiliation | Kobe University (Kobe Univ) |
| 5th Author's Name | Makoto Nagata |
| 5th Author's Affiliation | Kobe University (Kobe Univ) |
| 6th Author's Name | Karthik Srinivasan |
| 6th Author's Affiliation | ANSYS (ANSYS) |
| 7th Author's Name | Shan Wan |
| 7th Author's Affiliation | ANSYS (ANSYS) |
| 8th Author's Name | Lagn Lin |
| 8th Author's Affiliation | ANSYS (ANSYS) |
| 9th Author's Name | Ying-Shiun Li |
| 9th Author's Affiliation | ANSYS (ANSYS) |
| 10th Author's Name | Norman Chang |
| 10th Author's Affiliation | ANSYS (ANSYS) |
| 11th Author's Name | |
| 11th Author's Affiliation | () |
| 12th Author's Name | |
| 12th Author's Affiliation | () |
| Speaker | Author-1 |
| Date Time | 2020-03-07 13:25:00 |
| Presentation Time | 25 minutes |
| Registration for | HWS |
| Paper # | VLD2019-142, HWS2019-115 |
| Volume (vol) | vol.119 |
| Number (no) | no.443(VLD), no.444(HWS) |
| Page | pp.279-282 |
| #Pages | 4 |
| Date of Issue | 2020-02-26 (VLD, HWS) |
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