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| Presentation | 2020-07-31 17:30 An Area Reduction Oriented Controller Augmentation Method Based on Functionally Equivalent Finite State Machine Generation Atsuya Tsujikawa, Toshinori Hosokawa (Nihon Univ.), Masayoshi Yoshimura (Kyoto Sangyo Univ.)  CPSY2020-15 DC2020-15 |
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| Abstract | (in Japanese) | (See Japanese page) |
| (in English) | In recent year, controller augmentation has been used for design-for-testability and design-for-security at register transfer level. Controllers can be modeled by finite state machines. Controller augmentation increases the number of states and the number of state transitions so that the bit width of the state register and the number of inputs increase. Therefore , as the bit width of the state register and the number of inputs increase, the area overhead increases. In this paper, we propose an area reduction oriented controller augmentation method based on functionally equivalent finite state machine generation. Furthermore, we propose a logic synthesis method based on the characteristics of the augmented controllers. | |
| Keyword | (in Japanese) | (See Japanese page) |
| (in English) | controller augmentation / resister transfer level / security design / logic synthesis / functionally equivalent finite state machine / / / | |
| Reference Info. | IEICE Tech. Rep., vol. 120, no. 122, DC2020-15, pp. 93-98, July 2020. | |
| Paper # | DC2020-15 | |
| Date of Issue | 2020-07-23 (CPSY, DC) | |
| ISSN | Online edition: ISSN 2432-6380 | |
| Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) | |
| Download PDF | CPSY2020-15 DC2020-15 |
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| Conference Information | |
| Committee | CPSY DC IPSJ-ARC |
| Conference Date | 2020-07-30 - 2020-07-31 |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Online |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | SWoPP2020: Parallel, Distributed and Cooperative Processing Systems and Dependable Computing |
| Paper Information | |
| Registration To | DC |
| Conference Code | 2020-07-CPSY-DC-ARC |
| Language | Japanese |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | An Area Reduction Oriented Controller Augmentation Method Based on Functionally Equivalent Finite State Machine Generation |
| Sub Title (in English) | |
| Keyword(1) | controller augmentation |
| Keyword(2) | resister transfer level |
| Keyword(3) | security design |
| Keyword(4) | logic synthesis |
| Keyword(5) | functionally equivalent finite state machine |
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| 1st Author's Name | Atsuya Tsujikawa |
| 1st Author's Affiliation | Nihon University (Nihon Univ.) |
| 2nd Author's Name | Toshinori Hosokawa |
| 2nd Author's Affiliation | Nihon University (Nihon Univ.) |
| 3rd Author's Name | Masayoshi Yoshimura |
| 3rd Author's Affiliation | Kyoto Sangyo University (Kyoto Sangyo Univ.) |
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| Speaker | Author-1 |
| Date Time | 2020-07-31 17:30:00 |
| Presentation Time | 30 minutes |
| Registration for | DC |
| Paper # | CPSY2020-15, DC2020-15 |
| Volume (vol) | vol.120 |
| Number (no) | no.121(CPSY), no.122(DC) |
| Page | pp.93-98 |
| #Pages | 6 |
| Date of Issue | 2020-07-23 (CPSY, DC) |
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