Paper Abstract and Keywords |
Presentation |
2020-11-17 09:55
Efficient computation of inductive invariant through flipflop selection Fudong Wang, Masahiro Fujita (U-Tokyo) VLD2020-20 ICD2020-40 DC2020-40 RECONF2020-39 Link to ES Tech. Rep. Archives: ICD2020-40 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
As we all know, verification plays more and more important role in VLSI design and manufacture. However, it always takes too long time to affect efficiency and be costly. Inductive invariant which can represent the reachable states of circuits could be used to accelerate verification procedure. So main question we need to solve in this paper is how to generate inductive invariant efficiently. In general, we try to explore the dependency and coherence among all state variables which could be quantified by generating parameters and help us select flipflops instead of manually picking them up. The experiments on benchmark ISCA89 and ITC99 show effectiveness of the proposed method. Furthermore, the generated inductive invariant which represents exact or supersets of reachable states can be used to check if it intersects with bad states to prove circuit properties, which can be applied to various types of reachability-based analysis. The experimental results of reachability analysis on benchmark circuit HWMCC are also given. |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
Inductive Invariant / Larch affinity / reachability Analysis / Flipflop Selection / / / / |
Reference Info. |
IEICE Tech. Rep., vol. 120, no. 234, VLD2020-20, pp. 54-59, Nov. 2020. |
Paper # |
VLD2020-20 |
Date of Issue |
2020-11-10 (VLD, ICD, DC, RECONF) |
ISSN |
Online edition: ISSN 2432-6380 |
Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
Download PDF |
VLD2020-20 ICD2020-40 DC2020-40 RECONF2020-39 Link to ES Tech. Rep. Archives: ICD2020-40 |
Conference Information |
Committee |
VLD DC RECONF ICD IPSJ-SLDM |
Conference Date |
2020-11-17 - 2020-11-18 |
Place (in Japanese) |
(See Japanese page) |
Place (in English) |
Online |
Topics (in Japanese) |
(See Japanese page) |
Topics (in English) |
Design Gaia 2020 -New Field of VLSI Design- |
Paper Information |
Registration To |
VLD |
Conference Code |
2020-11-VLD-DC-RECONF-ICD-SLDM |
Language |
English |
Title (in Japanese) |
(See Japanese page) |
Sub Title (in Japanese) |
(See Japanese page) |
Title (in English) |
Efficient computation of inductive invariant through flipflop selection |
Sub Title (in English) |
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Keyword(1) |
Inductive Invariant |
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Larch affinity |
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reachability Analysis |
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Flipflop Selection |
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1st Author's Name |
Fudong Wang |
1st Author's Affiliation |
University of Tokyo (U-Tokyo) |
2nd Author's Name |
Masahiro Fujita |
2nd Author's Affiliation |
University of Tokyo (U-Tokyo) |
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Speaker |
Author-1 |
Date Time |
2020-11-17 09:55:00 |
Presentation Time |
25 minutes |
Registration for |
VLD |
Paper # |
VLD2020-20, ICD2020-40, DC2020-40, RECONF2020-39 |
Volume (vol) |
vol.120 |
Number (no) |
no.234(VLD), no.235(ICD), no.236(DC), no.237(RECONF) |
Page |
pp.54-59 |
#Pages |
6 |
Date of Issue |
2020-11-10 (VLD, ICD, DC, RECONF) |
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