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| Presentation | 2021-12-01 09:20 Soft Errors on Flip-flops Depending on Circuit and Layout Structures Estimated by TCAD Simulations Moeka Kotani, Ryuichi Nakajima (KIT), Kazuya Ioki (ROHM), Jun Furuta, Kazutoshi Kobayashi (KIT)  VLD2021-17 ICD2021-27 DC2021-23 RECONF2021-25 Link to ES Tech. Rep. Archives: ICD2021-27 |
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| Abstract | (in Japanese) | (See Japanese page) |
| (in English) | We compare the soft error tolerance of conventional flip-flops (FFs) and the proposed radiation-hard FF with small area, delay and area overheads by adding transistors and wires in a 130 nm process by using device simulation. Circuit simulations cannot evaluate layout dependence of soft errors. By constructing layout structures on TCAD, the layout dependence is evaluated. The critical LET of the proposed circuit becomes 2.5x larger than the conventional FF and the cross section of the proposed circuit is decreased to 30%. The correlation coefficient of the soft error tolerance on a specific condition between the measurement results and the circuit simulation results is 0.34, while that between the measurement results and the device simulation results becomes 0.74. | |
| Keyword | (in Japanese) | (See Japanese page) |
| (in English) | Soft error / Device simulation / Circuit simulation / Reliability / / / / | |
| Reference Info. | IEICE Tech. Rep., vol. 121, no. 277, VLD2021-17, pp. 1-6, Dec. 2021. | |
| Paper # | VLD2021-17 | |
| Date of Issue | 2021-11-24 (VLD, ICD, DC, RECONF) | |
| ISSN | Online edition: ISSN 2432-6380 | |
| Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) | |
| Download PDF | VLD2021-17 ICD2021-27 DC2021-23 RECONF2021-25 Link to ES Tech. Rep. Archives: ICD2021-27 |
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| Conference Information | |
| Committee | VLD DC RECONF ICD IPSJ-SLDM |
| Conference Date | 2021-12-01 - 2021-12-02 |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Online |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | Design Gaia 2021 -New Field of VLSI Design- |
| Paper Information | |
| Registration To | VLD |
| Conference Code | 2021-12-VLD-DC-RECONF-ICD-SLDM |
| Language | Japanese |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Soft Errors on Flip-flops Depending on Circuit and Layout Structures Estimated by TCAD Simulations |
| Sub Title (in English) | |
| Keyword(1) | Soft error |
| Keyword(2) | Device simulation |
| Keyword(3) | Circuit simulation |
| Keyword(4) | Reliability |
| Keyword(5) | |
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| 1st Author's Name | Moeka Kotani |
| 1st Author's Affiliation | Kyoto Institute of Technology (KIT) |
| 2nd Author's Name | Ryuichi Nakajima |
| 2nd Author's Affiliation | Kyoto Institute of Technology (KIT) |
| 3rd Author's Name | Kazuya Ioki |
| 3rd Author's Affiliation | ROHM Co., Ltd (ROHM) |
| 4th Author's Name | Jun Furuta |
| 4th Author's Affiliation | Kyoto Institute of Technology (KIT) |
| 5th Author's Name | Kazutoshi Kobayashi |
| 5th Author's Affiliation | Kyoto Institute of Technology (KIT) |
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| Speaker | Author-1 |
| Date Time | 2021-12-01 09:20:00 |
| Presentation Time | 25 minutes |
| Registration for | VLD |
| Paper # | VLD2021-17, ICD2021-27, DC2021-23, RECONF2021-25 |
| Volume (vol) | vol.121 |
| Number (no) | no.277(VLD), no.278(ICD), no.279(DC), no.280(RECONF) |
| Page | pp.1-6 |
| #Pages | 6 |
| Date of Issue | 2021-11-24 (VLD, ICD, DC, RECONF) |
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