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| Presentation | 2022-03-01 10:55 On Correction for Temperature and Voltage Effects in On-Chip Delay Measurement Takaaki Kato (KIT), Yousuke Miyake (PRIVATECH), Seiji Kajihara (KIT)  DC2021-67 |
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| Abstract | (in Japanese) | (See Japanese page) |
| (in English) | It is effective for aging of a logic circuit to measure a circuit delay periodically in field. In order to compare the delay value with other values measured in different time, the delay value should be corrected because the circuit delay is affected by variation of temperature and voltage in field measurement. In the previous work correction was done by using temperature and voltage values computed with an on-chip sensor, however it had a problem that correction errors are accumulated through the complex calculation process. This paper proposes a new correction method to eliminate temperature and voltage effects from measured delay values with ring-oscillators. In addition, a calibration method for reducing correction errors is proposed, and finally evaluation results with TEG chips in 65nm CMOS process shows effectiveness of the proposed methods. | |
| Keyword | (in Japanese) | (See Japanese page) |
| (in English) | Delay measurement / In-field test / Logic BIST / Degradation detection / Ring-Oscillator / / / | |
| Reference Info. | IEICE Tech. Rep., vol. 121, no. 388, DC2021-67, pp. 18-23, March 2022. | |
| Paper # | DC2021-67 | |
| Date of Issue | 2022-02-22 (DC) | |
| ISSN | Online edition: ISSN 2432-6380 | |
| Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) | |
| Download PDF | DC2021-67 |
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| Conference Information | |
| Committee | DC |
| Conference Date | 2022-03-01 - 2022-03-01 |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Kikai-Shinko-Kaikan Bldg. |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Paper Information | |
| Registration To | DC |
| Conference Code | 2022-03-DC |
| Language | Japanese |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | On Correction for Temperature and Voltage Effects in On-Chip Delay Measurement |
| Sub Title (in English) | |
| Keyword(1) | Delay measurement |
| Keyword(2) | In-field test |
| Keyword(3) | Logic BIST |
| Keyword(4) | Degradation detection |
| Keyword(5) | Ring-Oscillator |
| Keyword(6) | |
| Keyword(7) | |
| Keyword(8) | |
| 1st Author's Name | Takaaki Kato |
| 1st Author's Affiliation | Kyushu Institute of Technology (KIT) |
| 2nd Author's Name | Yousuke Miyake |
| 2nd Author's Affiliation | PRIVATECH Inc. (PRIVATECH) |
| 3rd Author's Name | Seiji Kajihara |
| 3rd Author's Affiliation | Kyushu Institute of Technology (KIT) |
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| Speaker | Author-1 |
| Date Time | 2022-03-01 10:55:00 |
| Presentation Time | 25 minutes |
| Registration for | DC |
| Paper # | DC2021-67 |
| Volume (vol) | vol.121 |
| Number (no) | no.388 |
| Page | pp.18-23 |
| #Pages | 6 |
| Date of Issue | 2022-02-22 (DC) |
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